Current Feedback Dual Operational Amplifier

www.DataSheet4U.com ZL40123 High Speed, Current Feedback Dual Operational Amplifier Data Sheet Features • • • • • • 450 MHz small signal bandwidth 1500V/µs slew rate 5.2 mA/channel static supply current 65 mA output current 120 MHz gain flatness to +/- 0.1 dB 8 pin SOIC the ideal choice where a high density of high speed devices is required. The flat gain response to 120 MHz, 450 MHz small signal bandwidth and 1500V/µs slew rate make the device an excellent solution for video applications such as driving video signals down significant cable lengths. Other applications which may take advantage of the ZL40123 superior dynamic performance features include low cost high order active filters and twisted pair driver/receivers. ZL40123/DCA ZL40123/DCB ZL40123DCE1 ZL40123DCF1 Ordering Information 8 Pin SOIC Tubes 8 Pin SOIC Tape & Reel 8 Pin SOIC* Tubes, Bake & Drypack 8 Pin SOIC* Trays, Bake & Drypack *Pb Free Matte Tin -40°C to +85°C March 2006 Applications • • • • Video switchers/routers Video line drivers Twisted pair driver/receiver Active filters Description The ZL40123 is a high speed, dual, current feedback operational amplifier offering high performance at a low cost. The device has a very high output current drive capability of 65 mA while requiring only 5.2 mA of static supply current. This feature makes the ZL40123 Out_1 1 8 V+ In_n_1 2 7 Out_2 1 In_p_1 3 6 In_n_2 2 V- 4 ZL40123 5 In_p_2 Figure 1 - Functional Block Diagram and Pin Connection 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved. ZL40123 Change Summary Data Sheet Changes from January 2005 Issue to March 2006 Issue. Page, section, figure and table numbers refer to this current issue. Page 1 Item Change Updated Ordering Information Application Notes Current Feedback Op Amps Current feedback op amps offer several advantages over voltage feedback amplifiers: • • • AC bandwidth not dependent on closed loop gain High Slew Rate Fast settling time The architecture of the current feedback opamp consists of a high impedance non-inverting input and a low impedance inverting input which is always feedback connected. The error current is amplified by a transimpedance amplifier which can be considered to have gain Z( f ) = Zo  f  1+ j   f   o where Zo is the DC gain. It can be shown that the closed loop non-inverting gain is given by Vout = Vin Av  fR f  1+ j   f Z   o o f o Z o GBOL = Rf Rf where Av is the DC closed loop gain, Rf is the feedback resistor. The closed loop bandwidth is therefore given by BWCL = and for low values of closed loop gain Av depends only on the feedback resistor Rf and not the closed loop gain. Increasing the value of Rf • • • • • Increases closed loop stability Decreases loop gain Decreases bandwidth Reduces gain peaking Reduces overshoot Using a resistor value of Rf=510 Ω for Av=+2 V/V gives good stability and bandwidth. However since requirements for stability and bandwidth vary it may be worth experimentation to find the optimal Rf for a given application. 2 Zarlink Semiconductor Inc. ZL40123 Layout Considerations Data Sheet Correct high frequency operation requires a considered PCB layout as stray capacitances have a strong influence over high frequency operation for this device. The Zarlink evaluation board serves as a good example layout that should be copied. The following guidelines should be followed: • • • Include 6.8 uF tantalum and 0.1 uF ceramic capacitors on both positive and negative supplies Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitances Minimize all trace lengths to reduce series inductance 3 Zarlink Semiconductor Inc. ZL40123 Application Diagrams Vcc 6.8uF Data Sheet Vin 0.1uF Vout ½ ZL40123 Rin Rf Ra 0.1uF Vout Rf = Av = 1 + Vin Ra 6.8uF Vee Figure 2 - Non-inverting Gain Vcc 6.8uF • • • Rb 0.1uF ½ ZL40123 • Vout Rf Vin • Ra • • 0.1uF Rin • 6.8uF Vee • Vout Rf = Av = − Vin Ra Figure 3 - Inverting Gain 4 Zarlink Semiconductor Inc. ZL40123 Absolute Maximum Ratings Parameter Symbol Min. Max. Data Sheet Units 1 2 Vin Differential Output Short Circuit Protection VIN VOS/C ±1.2 See Apps Note in this data sheet ±6.5 VV2 V+ V+ (see Note 3) V 3 4 5 6 Supply voltage Voltage at Input Pins Voltage at Output Pins EDS Protection (HBM Human Body Model) (see Note 2) Storage Temperature Latch-up test Supply transient test V+, VV(+IN), V(-IN) VO V V V kV 7 8 9 -55 +150 (see Note 4) (see Note 5) °C ±100 mA for 100 ms 20% pulse for 100ms Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Human body model, 1.5 kΩ in series with 100 pF. Machine model, 20 Ω in series with 100 pF. 0.8 kV between the pairs of +INA, -INA and +INB pins only. 2kV between supply pins, OUTA or OUTB pins and any input pin. ±100 mA applied to input and output pins to force the device to go into "latch-up". The device passes this test to JEDEC spec 17. Positive and Negative supply transient testing increases the supplies by 20% for 100 ms. Note 2: Note 3: Note 4: Note 5: Operating Range Characteristic Min. Typ. Max. Units Comments Supply Voltage (Vcc) Operating Temperature (Ambient) Junction to Ambient resistance ±4.0 -40 Rth(j-a) 150 ±6.0 +85 V °C °C 4 layer FR4 board °C 4 layer FR4 board Junction to Case resistance Rth(j-c) 60 5 Zarlink Semiconductor Inc. ZL40123 Rf=510 Ω, Rload=100 Ω unless specified. Data Sheet Electrical Characteristics - Vcc=±5 V, Tamb=25°C(typ.),Tamb=-40°C to +85°C(min-max), Av=+2V/V, Characteristic Conditions Typ. 25°C Min./ Ma.x 25°C Min./ Max. –40 to +85°C Units Test Type1 Frequency Domain Response -3 dB Bandwidth Av=+1; Vo < 0.5Vp-p; Rf=1.5 kΩ Av=+2; Vo < 0.5Vp-p; Rf=510 Ω Av=+2; Vo < 5V p-p; Rf=510 Ω 450 380 170 120 0.01 0.015 - - MHz MHz MHz MHz % deg. C C C C C C +/- 0.1dB Flatness Differential Gain (NTSC) Differential Phase (NTSC) Time Domain Response Av=+2; Vo < 0.5Vp-p; Rf=510 Ω Rload=150 Ω Rload=150 Ω Rise and Fall Time Vout=0.5 V Step Vout=5 V Step 1 2.8 6 4 1500 - - ns ns ns % V/µs C C C C C Settling Time to 0.1% Overshoot Slew Rate Noise and Distortion Vout=2 V Step Vout=0.5 V Step Vout=5 V Step 2nd Harmonic Distortion 3nd Harmonic Distortion Equivalent Input Noise Voltage Non-Inverting Current Inverting Current Static, DC Performance Vout=2Vp-p, 1 MHz Vout=2Vp-p, 1 MHz -84 -85 - - dBc dBc C C >1 MHz >1 MHz >1 MHz 5.5 1.3 11 - - nV pV pA Hz Hz Hz C C C Input Offset Voltage Average Drift Input Bias Current – Non-inverting 2.7 2.6 ±6.3 ±5.6 ±7.7 15 ±6 mV µV/deg. C µA A C A 6 Zarlink Semiconductor Inc. ZL40123 Min./ Ma.x 25°C Min./ Max. –40 to +85°C Data Sheet Characteristic Conditions Typ. 25°C Units Test Type1 Average Drift Input Bias Current – Inverting Average Drift Power Supply Rejection Ratio (+ve) Power Supply Rejection Ratio (-ve) Common Mode Rejection Ratio Supply Current (per Channel) Miscellaneous Performance 7.4 DC DC DC Quiescent 61 58 54 5.2 ±25 58 56 50 6.5 6 ±28 15 57 55 49 6.7 nA/deg. C uA nA/deg. C dB dB dB mA C A C A A A A Input Resistance (Non-inverting) Input Capacitance (Non-inverting) Common Mode Input Range Output Voltage Range Output Current (max) Output Resistance, Closed Loop DC Rload=100 Ω 8 1 ±2.4 ±2.8 65 90 ±2.2 ±2.7 - ±2.0 ±2.6 - MΩ C C A A C C pF V V mA mΩ Note: Test Types: (A) 100% tested at 25°C. Over temperature limits are set by characterization and simulation. (B) Limits set by characterization or simulation. (C) Typical value only for information. 7 Zarlink Semiconductor Inc. ZL40123 Data Sheet Typical Performance Characteristics - Tamb=25°C, Vsupply=± 5 V, Rload=100 Ω, Av=+2V/V, Rf=510 Ω, unless otherwise specified. Non-Inverting Frequency Response 2 0 -2 Normalised Gain (dB) -4 Phase -6 -8 -10 -12 -14 1 10 Frequency (MHz) 100 Vo=0.5Vp-p Av =+4 Rf = 150 Av =+2 Rf = 510 0 -50 -100 -150 -200 1000 Av =+8 Rf = 150 Gain Av =+1 Rf = 1k 200 150 100 50 8 Zarlink Semiconductor Inc. Phase (deg.) ZL40123 Data Sheet Non-Inverting Frequency Response varying Rf 2 Rf=390 0 -2 Normalised Gain (dB) -4 -6 -8 -10 -12 -14 -16 -18 10 100 Frequency (MHz) 1000 Vo=0.5Vp-p Rf=700 Rf=510 Rf=250 Large Signal Gain 0 -2 -4 Gain (dB) -6 -8 -10 -12 -14 -16 10 100 Frequency (MHz) 1000 Vo = 5V p-p Vo = 4V p-p Vo = 1V p-p 9 Zarlink Semiconductor Inc. ZL40123 Open Loop Transimpedance Gain and Phase 120 110 Transimpedance Gain 100 Transimpedance Phase 90 80 70 60 50 40 1.0E+03 Transimpedance Gain 0 Data Sheet -30 -60 -90 -120 -150 -180 -210 -240 1.0E+09 Transimpedance Phase 1.0E+04 1.0E+05 1.0E+06 Frequency (Hz) 1.0E+07 1.0E+08 Harmonic Distortion vs Frequency -40 Vo = 2V p-p 2nd & 3rd Harmonic Distortion (dBc) -50 -60 2nd Harmonic -70 -80 3rd Harmonic -90 -100 1 10 Frequency (MHz) 100 10 Zarlink Semiconductor Inc. ZL40123 Data Sheet CMRR 70 T = - 40 degC 60 Rejection Ration (dB) 50 40 30 20 10 0 1.0E+03 T = + 25 degC T = + 85 degC 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) PSRR +ve 80 T = - 40 degC 70 Rejection Ration (dB) 60 T = + 25 degC 50 40 30 20 10 0 1.0E+03 T = + 85 degC 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) 11 Zarlink Semiconductor Inc. ZL40123 Data Sheet PSRR -ve 70 T = - 40 degC 60 Rejection Ration (dB) 50 40 30 20 10 0 1.0E+03 T = + 25 degC T = + 85 degC 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) T