www.DataSheet4U.com
MARCH 2007
XRT59L921
TWENTY-ONE CHANNEL E1 LINE INTERFACE UNIT
REV. 1.2.1
GENERAL DESCRIPTION
The XRT59L921 is an optimized twenty-one channel, E1, line interface unit, fabricated using low power CMOS technology. The device contains twenty-one independent E1 channels. It is primarily targeted towards the SDH multiplexers that accommodate TU12 Tributary Unit Frames. Line cards in these units multiplex 21 E1 channels into higher SDH rates. Devices with 21 E1 interfaces such as the XRT59L921 provide the most efficient method of implementing 63-channel line cards. Each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. The receiver input accepts transformer coupled 1:1 signals, while the transmitter is coupled to the line using a 1:2 transformer. The same transformer configuration can be used for both balanced and unbalanced interfaces. The device offers Loss of Signal (LOS) detection, that provides an LOS output indication signal with thresholds and delay that comply with the ITU G.775 requirements.
FEATURES
• Twenty-One (21) Independent E1 (CEPT) Line
Interface Units Recovery) (Transmitter, Receiver, and
• Transmit Output Pulses that are Compliant with the
ITU-T G.703 Pulse Template Requirement for 2.048Mbps (E1) Rates
• On-Chip Pulse Shaping for both 75Ω and 120Ω line
drivers
• Detects and Clears LOS (Loss of Signal) Per ITU-T
G.775
• Operates over the Industrial Temperature Range • Ultra Low power consumption • 3.3V operation with 5V Tolerant Input
APPLICATIONS
• PDH Multiplexers • SDH Multiplexers • Digital Cross-Connect Systems • DECT (Digital European Cordless Telephone) Base
Stations
• CSU/DSU Equipment
FIGURE 1. BLOCK DIAGRAM OF THE XRT59L921
Channels 2 - 20 Channel 1 Channel 0 LOS Detector LOS Detector
LOS_0
RTIP_0 RRing_0
Receive Receive Equalizer Equalizer
Peak Detector/Slicer Peak Detector/Slicer
Receive Output Receive Output Interface Interface
RxPOS_0 RxNEG_0
TTIP_0
TxPOS_0
Pulse Shaping Circuit Pulse Shaping Circuit
TRing_0 TxON
Transmit Input Interface Transmit Input Interface
TxCLK_0 TxNEG_0
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
XRT59L921
TWENTY-ONE CHANNEL E1 LINE INTERFACE UNIT
REV. 1.2.1
ORDERING INFORMATION
PART NUMBER XRT59L921IB PACKAGE 316 Shrink Thin Ball Grid Array (21.0 mm x 21.0 mm, STBGA) OPERATING TEMPERATURE RANGE -40°C to +85°C
FIGURE 2. PIN OUT OF THE XRT59L921 (BOTTOM VIEW)
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
o o o o o o o o o o o o o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
o o o o o o o o o o o o o o o o o o o o
A B C D E F G H J K L M N P R T U V W Y
o o o o
o o o o
o o o o
o o o o
o o o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
o o o o o
NOTE: Refer to pin list for pin names.
2
XRT59L921
REV. 1.2.1
TWENTY-ONE CHANNEL E1 LINE INTERFACE UNIT
TABLE OF CONTENTS
GENERAL DESCRIPTION................................................................................................. 1
FEATURES ..................................................................................................................................................... 1 APPLICATIONS ............................................................................................................................................... 1
FIGURE 1. BLOCK DIAGRAM OF THE XRT59L921 ............................................................................................................................. 1
ORDERING INFORMATION .................................................................................................................... 2
FIGURE 2. PIN OUT OF THE XRT59L921 (BOTTOM VIEW).................................................................................................................. 2
TABLE OF CONTENTS ............................................................................................................ I
PIN DESCRIPTIONS ........................................................................................................................................ 3 RECEIVER ELECTRICAL CHARACTERISTICS ...................................................................................... 12 TRANSMITTER ELECTRICAL CHARACTERISTICS ............................................................................... 12
FIGURE 3. E1. ITU G.703 PULSE TEMPLATE FOR TRANSMITTER OUTPUT........................................................................................ 13
DC ELECTRICAL CHARACTERISTICS ................................................................................................... 13 AC ELECTRICAL CHARACTERISTICS.................................................................................................... 14 PER CHANNEL POWER CONSUMPTION INCLUDING THE LINE POWER DISSIPATION, TRANMISSION AND RECEIVE PATHS ALL ACTIVE: ................................................................................................................................................. 14 ABSOLUTE MAXIMUM RATINGS ..................................................................................................................... 14 SYSTEM DESCRIPTION .......................................................................................................................... 15 1.0 THE TRANSMIT SECTION .................................................................................................................. 15
1.1 THE TRANSMIT INPUT INTERFACE ............................................................................................................ 15 1.2 OPERATING THE TRANSMITTER IN THE CLOCK MODE .......................................................................... 15
FIGURE 4. ILLUSTRATION ON HOW THE XRT59L921 SAMPLES THE DATA ON THE TXPOS_N AND TXNEG_N INPUT PINS................... 16 1.2.1 OPERATING THE TRANSMITTER IN THE CLOCKLESS MODE............................................................................. 16 1.2.2 SHUTTING OFF THE TRANSMITER.......................................................................................................................... 16 FIGURE 5. ILLUSTRATION ON HOW THE TERMINAL EQUIPMENT SHOULD APPLY DATA TO THE TRANSMIT SECTION OF A GIVEN CHANNEL (WITHIN THE XRT59L921), WHEN OPERATING IN THE CLOCKLESS MODE .................................................................................. 17
1.3 THE PULSE SHAPING CIRCUIT ................................................................................................................... 17
FIGURE 6. ILLUSTRATION OF THE ITU-T G.703 PULSE TEMPLATE FOR E1 APPLICATIONS ................................................................ 18
1.4 INTERFACING THE TRANSMIT SECTIONS OF THE XRT59L921 TO THE LINE ....................................... 18
FIGURE 7. ILLUSTRATION OF HOW TO INTERFACE THE TRANSMIT SECTIONS OF THE XRT59L921 TO THE LINE (FOR 75W APPLICATIONS) 19 FIGURE 8. ILLUSTRATION OF HOW TO INTERFACE THE TRANSMIT SECTIONS THE XRT59L921 TO THE LINE (FOR 120W APPLICATIONS)19
Transmit Transformer Recommendations ................................................................................................................. 19 The following Transformers are Recommended for Use........................................................................................... 20
MAGNETIC SUPPLIER INFORMATION .............................................................................................................. 20 2.0 THE RECEIVE SECTION ..................................................................................................................... 21
2.1 INTERFACING THE RECEIVE SECTIONS TO THE LINE (TRANSFORMER COUPLING) ......................... 21
FIGURE 9. RECOMMENDED SCHEMATIC FOR INTERFACING THE RECEIVE SECTIONS OF THE XRT59L921 TO THE LINE FOR 75W APPLICATIONS (TRANSFORMER-COUPLING) .................................................................................................................................. 21 FIGURE 10. RECOMMENDED SCHEMATIC FOR INTERFACING THE RECEIVE SECTIONS OF THE XRT59L921 TO THE LINE FOR 120W APPLICATIONS (TRANSFORMER-COUPLING) .............................................................................................................................. 22
TRANSFORMER RECOMENDATION ...................................................................................................... 23
Receive Transformer Recommendations .................................................................................................................. 23 2.2 INTERFACING THE XRT59L921 RECEIVE SECTION TO THE LINE (CAPACITIVE COUPLING) ............. 23
FIGURE 11. RECOMMENDED 75W CAPACITIVE COUPLING APPLICATION ........................................................................................... 23 FIGURE 12. RECOMMENDED 120W TWISTED PAIR CAPACITIVE COUPLING APPLICATION .................................................................. 23
2.3 THE RECEIVE EQUALIZER BOCK ............................................................................................................... 24 2.4 THE PEAK DETECTOR AND SLICER BLOCK ............................................................................................. 24 2.5 THE LOS DETECTOR BLOCK ...................................................................................................................... 24
FIGURE 13. ILLUSTRATION OF THE SIGNAL LEVELS