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Seven-Channel E1 Line Interface
December 2001-3
XRT5897
FEATURES D Compliant with ITU G.703 Pulse Mask Template for 2.048Mbps (E1) Rates D Seven Independent CEPT Transceivers D Supports Differential Transformer Coupled Receivers and Transmitters D On Chip Pulse Shaping for Both 75W and 120W Line Drivers D Compliant with ITU G.775 LOS Declaration/Clearing Recommendation D Optional User Selectable LOS Declaration/Clearing Delay D Compliant with ITU--T G.823 Jitter Tolerance Requirements D Logical Inputs Accept either 3.3V or 5.0V Levels D Ultra-Low Power Dissipation D +3.3V Supply Operation D Individual Transmit Channel Over Temperature Protection APPLICATIONS D SDH Multiplexer D Digital Cross Connects
GENERAL DESCRIPTION The XRT5897 is an optimized seven channel 3.3V line interface unit fabricated using low power CMOS technology. The device contains seven independent E1 channels. It is primarily targeted toward SDH multiplexers that accommodate TU12 Tributary Unit Frames. Line cards in these units multiplex 21 E1 interfaces into higher SDH rates. Devices with seven E1 interfaces such as the XRT5897 provide the most efficient method of implementing 21 channel line cards. Each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. The device requires transformers on both receiver and transmitter sides, and supports both balanced and unbalanced interfaces. ORDERING INFORMATION
Operating Temperature Range -40°C to +75°C
The device offers two distinct modes of LOS detection. The first method, which does not require an external clock, provides an LOS output indication signal with thresholds and delay that comply with the ITU G.775 requirements. In the second mode, the user provides an external clock that increases the delay for LOS declaration and clearing. This feature provides the user with the flexibility to implement LOS specifications that require a delay greater than the G.775 requirements.
Part No. XRT5897IV
Package 100 Lead TQFP (14 x 14 x 1.4mm)
Rev. 1.11
E2001
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017
XRT5897
BLOCK DIAGRAM
RTIP7 (69) TIP RX INPUT RING 1:2 R1 R2
Tranceiver 1 Tranceiver 2 Tranceiver 3 Tranceiver 4 Tranceiver 5 Tranceiver 6 Tranceiver 7 RXPOS7 (5) Singnal Peak Detector Receive Comparators RXNEG7 (6)
RRING7 (68) VCC LOS Detect Loss Delay Counter 1 MUX O LOS7 (4)
LOSCNT (73) LOSSEL (38) Transmit Line Drivers TIP TX OUTPUT RING 2:1 R3 9.1 R4 9.1 TRING7 (91) TTIP7 (89) Pulse Shaping
0 0 MUX 1 1
NRZ To RZ
Duty Cycle Adjust
TXCLK7 (87) TXPOS7 (85) TXNEG7 (86)
Figure 1. XRT5897 Block Diagram
Receiver Notes D The same type 1:2CT ratio transformer may be used at the receiver input and transmitter output. D R1 and R2 are both 150W for 75W operation, or 240W for 120W operation. D Return loss exceeds ITU G.703 specification with these resistors and a 1:2CT ratio input transformer. D LOSCNT (pin 73) is unconnected when LOSSEL is logic 1, or connected to an external clock when LOSSEL is logic 0. Transmitter Notes D Return loss exceeds ETSI 300 166 specification with a 1:2 ratio transformer. D R3 and R4 are always 9.1W for both 75W and 120W applications. D An approach exists that permits the user to operate the XRT5897 with a 5V power supply. For more information, please see application note TAN-12.
LOS (Loss of Signal) Notes D LOSSEL (pin 38) is connected to logic “1” for ITU G.775 compliant LOS delay, or to logic 0 for user programmable additional delay.
Rev. 1.11 2
XRT5897
PIN CONFIGURATION
LOS6 TXPOS6 TXNEG6 TXCLK6 GND TTIP6 VCC TRING6 GND TXPOS7 TXNEG7 TXCLK7 GND TTIP7 VCC TRING7 GND TRING1 VCC TTIP1 GND TXCLK1 TXNEG1 TXPOS1 LOS1
RXPOS6 RXNEG6 LOSCNT GND RTIP6 RRING6 RTIP7 RRING7 VCC GND VCC RRING5 RTIP5 GND TTIP5 V CC TRING5 GND TRING4 V CC TTIP4 GND RTIP4 RRING4 TXCLK4 75 76 51 50 TXNEG4 TXPOS4 LOS4 RXPOS4 RXNEG4 TXPOS5 TXNEG5 TXCLK5 RXNEG5 RXPOS5 LOS5 GND LOSSEL VCC LOS2 RXPOS2 RXNEG2 TXCLK2 TXNEG2 TXPOS2 RXNEG3 RXPOS3 LOS3 TXPOS3 TXNEG3 100 1 25 26
Rev. 1.11 3
RXPOS1 RXNEG1 VCC LOS7 RXPOS7 RXNEG7 RTIP1 RRING1 VCC GND VCC RRING2 RTIP2 GND TTIP2 VCC TRING2 GND TRING3 VCC TTIP3 GND RTIP3 RRING3 TXCLK3
100 LEAD THIN QUAD FLAT PACK (14 x 14 x 1.4 mm, TQFP)
XRT5897
PIN DESCRIPTION
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Symbol RXPOS1 RXNEG1 VCC LOS7 RXPOS7 RXNEG7 RTIP1 RRING1 VCC GND VCC RRING2 RTIP2 GND TTIP2 VCC TRING2 GND TRING3 VCC TTIP3 GND RTIP3 RRING3 TXCLK3 TXNEG3 TXPOS3 LOS3 RXPOS3 RXNEG3 TXPOS2 TXNEG2 TXCLK2 RXNEG2 RXPOS2 I I I I I O O O I I I O O O O O O I I O O O I I Type O O Description Receiver 1 Positive Data Out. Positive RZ data output for channel 1. Receiver 1 Negative Data Out. Negative RZ data output for channel 1. Positive Supply (+3.3V + 5%). Digital circuitry. Receiver 7 Loss of Signal. Asserted during LOS condition. Receiver 7 positive Data Out. Positive RZ data output for channel 7. Receiver 7 Negative Data Out. Negative RZ data output for channel 7. Receiver 1 Positive Bipolar Input. Receiver 1 Negative Bipolar Input. Positive Supply (+3.3V + 5%). Analog circuitry. Analog Ground. Positive Supply (+3.3V + 5%). Receivers 1, 2, 3, and 7. Receiver 2 Negative Bipolar Input. Receiver 2 Positive Bipolar Input. Analog Ground. Receivers 1, 2, 3, and 7. Transmitter 2 Positive Bipolar Output. Positive Supply (+3.3V + 5%). Transmitter channel 2. Transmitter 2 Negative Bipolar Output. Digital Ground. Transmitter channel 2. Transmitter 3 Negative Bipolar Output. Positive Supply (+3.3V + 5%). Transmitter channel 3. Transmitter 3 Positive Bipolar Output. Digital Ground. Transmitter channel 3. Receiver 3 Positive Bipolar Input. Receiver 3 Negative Bipolar Input. Transmitter 3 Clock Input. Use for clocked mode with NRZ data.1 Transmitter 3 Negative Data Input. Negative NRZ or RZ data input.1 Transmitter 3 Positive Data Input. Positive NRZ or RZ data input.1 Receiver 3 Loss of Signal. Asserted during LOS condition. Receiver 3 Positive Data Out. Positive RZ data output for channel 3. Receiver 3 Negative Data Out. Negative RZ data output for channel 3. Transmitter 2 Positive Data Input. Positive NRZ or RZ data input.1 Transmitter 2 Negative Data Input. Negative NRZ or RZ data input.1 Transmitter 2 Clock Input. Use for clocked mode with NRZ data.1 Receiver 2 Negative Data Out. Negative RZ data output for channel 2. Receiver 2 Positive Data Out. Positive RZ data output for channel 2.
Note: 1 Has internal pull-up 50KW resistor. Rev. 1.11 4
XRT5897
PIN DESCRIPTION (CONT’D)
Pin # 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 Symbol LOS2 VCC LOSSEL GND LOS5 RXPOS5 RXNEG5 TXCLK5 TXNEG5 TXPOS5 RXNEG4 RXPOS4 LOS4 TXPOS4 TXNEG4 TXCLK4 RRING4 RTIP4 GND TTIP4 VCC TRING4 GND TRING5 VCC TTIP5 GND RTIP5 RRING5 VCC GND VCC RRING7 RTIP7 RRING6 I I I I I O O O O O O O I I I O O O I I I I I I Type O Description Receiver 2 Loss of Signal. Asserted during LOS condition. Digital Supply (+3.3V + 5%). Digital circuitry. Loss of Signal Delay Select. “Hi” selects G.775, “Lo” selects user programmable.1 Digital Ground. Receiver 5 Loss of Signal. Asserted during LOS condition. Receiver 5 Positive Data Out. Positive RZ data output for channel 5. Receiver 5 Negative Data Out. Negative RZ data output for channel 5. Transmitter 5 Clock Input. Use for clocked mode with NRZ data.1 Transmitter 5 Negative Data Input. Negative NRZ or RZ data input.1 Transmitter 5 Positive Data Input. Positive NRZ or RZ data input.1 Receiver 4 Negative Data Out. Negative RZ data output for channel 4. Receiver 4 Positive Data Out. Positive RZ data output for channel 4. Receiver 4 Loss of Signal. Asserted during LOS condition. Transmitter 4 Positive Data Input. Positive NRZ or RZ data input.1 Transmitter 4 Negative Data Input. Negative NRZ or RZ data input.1 Transmitter 4 Clock Input. Use for clocked mode with NRZ data.1 Receiver 4 Negative Bipolar Input. Receiver 4 Positive Bipolar Input. Analog Ground. Transmitter 4 Positive Bipolar Output. Positive Supply (+3.3V + 5%). Transmitter channel 4. Transmitter 4 Negative Bipolar Output. Digital Ground. Transmitter channel 4. Transmitter 5 Negative Bipolar Output. Positive Supply (+3.3V + 5%). Transmitter channel 5. Transmitter 5 Positive Bipolar Output. Digital Ground. Transmitter channel 5. Receiver 5 Positive Bipolar Input. Receiver 5 Negative Bipolar Input. Positive Supply (+3.3V + 5%). Low level transmitter analog circuitry. Analog Ground. Low level transmitter analog circuitry. Positive Supply (+3.3V + 5%). Receiver channels 4, 5, and 6. Receiver 7 Negative Bipolar Input. Receiver 7 Positive Bipolar Input. Receiver 6 Negative Bipolar Input.
Note: 1 Has internal pull-up 50KW resistor. Rev. 1.11 5
XRT5897
PIN DESCRIPTION (CONT’D)
Pin # 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Symbol RTIP6 GND LOSCNT RXNEG6 RXPOS6 LOS6 TXPOS6 TXNEG6 TXCLK6 GND TTIP6 VCC TRING6 GND TXPOS7 TXNEG7 TXCLK7 GND TTIP7 VCC TRING7 GND TRING1 VCC TTIP1 GND TXCLK1 TXNEG1 TXPOS1 LOS1 I I I O O O O O I I I O O I O O O I I I Type I Description Receiver 6 Positive Bipolar Input. Analog Ground. Receiver channels 4, 5, and 6. Loss of Signal Timing Clock Input. For user-programmable LOS delay.1 Receiver 6 Negative Data Out. Negative RZ data output for channel 6. Receiver 6 Positive Data Out. Positive RZ data output for channel 6. Receiver 6 Loss of Signal. Asserted during LOS condition. Transmitter 6 Positive Data Input. Positive NRZ or RZ data input.1 Transmitter 6 Negative Data Input. Negative NRZ or RZ data input.1 Transmitter 6 Clock Input. Use for clocked mode with NRZ data.1 Digital Ground. Transmitter channel 6. Transmitter 6 Positive Bipolar Output. Positive Supply (+3.3V + 5%). Transmitter channel 6. Transmitter 6 Negative Bipolar Output. Digital Ground. Transmitter 7 Positive Data
