CMOS Current Output D/A Converter Design Concepts

www.DataSheet4U.com

   
  
        XRDAN30 Introduction !" # $%    &        ' '         '           %   (       $ &  
         )$ $   
   $       $   ' %             )$   )
        $       )$      $$*      The Effect of DAC Output Capacitance  +Figure 1.)        '       $ 
     '   Figure 2.   (
  ,      - -. -.
 • K 1 + S• P1 /01 Figure 2. Equivalent Circuit at Full Scale for AC Analysis %      % $       +  $         '   & Figures 3, 4 and 5.2&        3)   $   &   )  )  $  )     1        
       4,   - -. -.
 - Gain (dB) Amp Main Pole P1 /01 ,(% +4 2
     Figure 3. Op Amp Open Loop Characteristics Figure 1. Typical Configuration CMOS IOUT DAC with External Op Amp forming Voltage Output Configuration ,(% +4 2 R IN 20 Lo g ( ) R IN + Rf Gain (dB) R IN • R f x C O = 1 P2 Figure 4. Feedback Signal Path Transfer Characteristics   XRDAN30 4,  5 5 Gain (dB) $  5 5 ,(% +4 2 Figure 5. Root Locus Figure 8. Op Amp Open Loop Characteristics ,(% +4 2 R IN 20 Lo g ( ) R IN + Rf : +2 5 R IN • R f x (C Z + C O) 6 "
*  $           6 +    2   )7   $    
    (Figure 6. and Figure 7.) 1 '    % $   +, 8& 9&   )    3  
6  - -. -.
 - Figure 9. Feedback Signal Path Transfer Characteristics /01 5 6 5 Figure 6. Typical Zero Compensation of Co General Pole
6 Figure 10. Root Locus %   
 (Figure 11. and Figure 12.)& ; $' $   )  < 2 1       & $7    $ $  (Figures 13, 14, and 15) 2 1
 "   &     $  $   
  =2 1    
   $ $    
& $$*       + 1
      &         2 ;2
*  ) $ $&    
(%     - -. -.
 - • K 1 + S• P1 /01 Figure 7. Equivalent Circuit at Full Scale for AC Analysis   XRDAN30
6 20 Lo g (  - -. -.
 - : +2 5 R A • R IN • R f x (C Z + C O) 6 "
* R IN ) R IN + Rf ,(% +4 2  /01 Figure 14. Feedback Signal Path Transfer Characteristics Figure 11. Typical Zero Compensation of Co General Pole 5
6 6 5  - -. -.
 - • K 1 + S• P1  /01 Figure 15. Root Locus 1 ) %   *         )      $      (%      -.  /01   
6    
  Figure 12. Equivalent Circuit at Full Scale for AC Analysis  - 4,  -. -.
   -  /-  4 /01
4 - Gain (dB) $  5 5 ,(% +4 2 Figure 16. Typical Zero Compensation of Co General Pole Figure 13. Op Amp Open Loop Characteristics  = XRDAN30 Output Loading Effects ,%&     )     '     $       (Figure 16.)   (% $     3 ' & 7      $ $      &           !   $  )  %  (  %   &        %  $  1      -  ' %     $    %  ('   $  $$ >  >
      $             )$ 1 % )7   '     
   )%      1    -  ? $  $     $  %  $           .5.   (         ,%&          $%  $     %
   $ '       
   )%   ? 4    1    ) % )
*  )7   ( 1 ) '     $ )% 3 $          $ )    7            :< %     $  -      =  @   ) 
  & 1
  )  )%  = A    B% 7 C       A Practical Example .&  %   5D>9     5D@8< 1 5D>9  
   , 1 5D@8
  @ , %    E 7
&     &  5D>9     %                    ) =  @      5D@8    &  5D>9          B    5D@8C   ;