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JUNE 2004
XR17C152
5V PCI BUS DUAL UART
REV. 1.2.0
GENERAL DESCRIPTION
The XR17C1521 (152) is a monolithic dual PCI Bus Universal Asynchronous Receiver and Transmitter (UART) in Exar’s PCI Bus UART family. The device is designed to meet today’s 32-bit PCI Bus and high bandwidth requirement in communication systems. The global interrupt source register provides a complete interrupt status indication for both channels to speed up interrupt parsing. Each UART is independently controlled and has its own 16C550 compatible 5G (Fifth Generation) register set, transmit and receive FIFOs of 64 bytes, fully programmable transmit and receive FIFO trigger levels, transmit and receive FIFO level counters, automatic hardware flow control with programmable hysteresis, automatic software (Xon/Xoff) flow control, automatic half-duplex control output, wireless IrDA (Infrared Data Association) infrared encoder/decoder, 8 multi-purpose definable inputs/outputs, and a 16-bit general purpose timer/ counter.
NOTE: 1 Covered by U.S. Patents #5,649,122, #5,949,787
FEATURES • High Performance Dual PCI UART • PCI Bus 2.2 Target Interface Compliance • 5V PCI Bus Compliant up to 33MHz Clock • 32-bit PCI Bus Interface with EEPROM Interface • A Global Interrupt Source Register for both UARTs • Data Transfer in Byte, Word and Double-word • Data Read/Write Burst Operation • Each UART is independently controlled with: •16C550 Compatible 5G Register Set •64-byte Transmit and Receive FIFOs •Transmit and Receive FIFO Level Counters •Automatic RTS/CTS or DTR/DSR Flow Control •Automatic Xon/Xoff Software Flow Control •Automatic RS485 Half-duplex Control Output with 16 Selectable Turn-around Delay •Infrared (IrDA 1.0) Data Encoder/Decoder •Programmable Data Rate with Prescaler •Up to 6.25 Mbps Serial Data Rate at 5V and 8X Sampling • Eight Multi-Purpose Inputs/outputs • A General Purpose 16-bit Timer/Counter • Sleep Mode with Automatic Wake-up Indicator • Same package and pinout as the XR17D152 (14x14x1.0mm TQFP package)
APPLICATIONS • Network Management • Factory Automation and Process Control • Ethernet Network to Serial Ports • Point-of-Sale Systems • Remote Access Servers • Multi serial ports RS-232/RS-422/RS-485 Cards FIGURE 1. BLOCK DIAGRAM
5V VCC CLK RST# AD[31:0] C/BE[3:0]# FRAME# IRDY# TRDY# DEVSEL# STOP# INTA# IDSEL PERR# SERR# PAR UART Channel 0
UART Regs 64 Byte TX FIFO TX & RX IR ENDEC
GND
TX0, RX0, DTR0#, DSR0#, RTS0#, CTS0#, CD0#, RI0#
PCI Local Bus Interface
Device Configuration Registers
BRG
64 Byte RX FIFO
UART Channel 1
UART Regs 64 Byte TX FIFO TX & RX BRG IR ENDEC
TX1, RX1, DTR1#, DSR1#, RTS1#, CTS1#, CD1#, RI1#
64 Byte RX FIFO
Configuration Space Registers
EECK EEDI EEDO EECS ENIR EN485#
EEPROM Interface
16-bit Timer/Counter
Multi-purpose . Inputs/Outputs Crystal Osc/Buffer
MPIO0- MPIO7 XTAL1 XTAL2 TMRCK
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
XR17C152 5V PCI BUS DUAL UART FIGURE 2. PIN OUT OF THE DEVICE
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REV. 1.2.0
TMRCK
DSR0#
EN485#
DSR1#
DTR0#
DTR1#
RTS0#
CTS0#
RTS1#
CTS1#
MPIO0 52
ENIR
72
75
74
71
70
66
73
69
67
65
64
68
63
61
62
60
59
58
57
55
56
XTAL2 XTAL1 GND TEST# VCC EEDO EEDI EECS EECK INTA# RST# CLK GND VCC AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 C/BE3# IDSEL
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
54
53
51
MPIO1
CD0#
CD1#
GND
VCC
RI0#
RI1#
RX0
RX1
TX0
TX1
NC
NC
50 49 48 47 46 45 44 43 42 41 40
MPIO2 MPIO3 MPIO4 MPIO5 MPIO6 MPIO7 GND VCC AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 C/BE0# GND VCC AD8 AD9 AD10 AD11 AD12 AD13
XR17C152 100-TQFP (14x14x1.0mm)
39 38 37 36 35 34 33 32 31 30 29 28 27 26
VCC 100
11
21
19
10
12
18
20
22
17
23
24 AD15
FRAME# 13
IRDY# 14
C/BE2#
TRDY# 15
GND
16
DEVSEL#
GND
PAR
VCC
GND
STOP#
AD23
AD22
AD21
AD20
AD18
AD17
PERR#
SERR#
ORDERING INFORMATION
PART NUMBER XR17C152CM XR17C152IM PACKAGE 100-Lead TQFP 100-Lead TQFP OPERATING TEMPERATURE RANGE 0°C to +70°C -40°C to +85°C DEVICE STATUS Active Active
2
C/BE1#
AD19
AD16
AD14
VCC
25
4
2
8
1
3
5
6
7
9
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REV. 1.2.0
XR17C152 5V PCI BUS DUAL UART
PIN DESCRIPTIONS
Pin Description
NAME PIN # TYPE DESCRIPTION
PCI LOCAL BUS INTERFACE RST# 86 I Bus reset input (active low). It resets the PCI local bus configuration space registers, device configuration registers and UART channel registers to the default condition, see Table 19 on page 48. Bus clock input of up to 33MHz at 5V. Address data lines [31:0] (bidirectional).
CLK AD31-AD24, AD23-AD16, AD15-AD8, AD7-AD0 FRAME# C/BE3#-C/BE0#
87 90-97, 2-9, 24-31, 35-42 13 98, 12, 21, 34 14
I I/O
I I
Bus transaction cycle frame (active low). It indicates the beginning and duration of an access. Bus Command/Byte Enable [3:0] (active low). This line is multiplexed for bus Command during the address phase and Byte Enables during the data phase. Initiator Ready (active low). During a write, it indicates that valid data is present on data bus. During a read, it indicates the master is ready to accept data. Target Ready (active low). Target request to stop current transaction (active low). Initialization device select (active high). Device select to the XR17C152 (active low). Device interrupt from XR17C152 (open drain, active low). Parity is even across AD[31:0] and C/BE[3:0]# (bidirectional, active high). Data Parity error indicator, except for Special Cycle transactions (active low). Optional in bus target application. System error indicator, Address parity or Data parity during Special Cycle transactions (open drain, active low). Optional in bus target application. UART channel 0 Transmit Data or infrared transmit data. Normal TXD output idles HIGH while infrared TXD output idles LOW. UART channel 0 Receive Data or infrared receive data. Normal RXD input idles HIGH while infrared RXD input idles LOW. In the infrared mode, the polarity of the incoming RXD signal can be selected via FCTR bit-4. If this bit is a logic 0, a LOW on the RXD input is considered a mark and if this bit is a logic 1, a HIGH on the RXD input is considered a space. UART channel 0 Request to Send or general purpose output (active low). If this output is not used, leave it unconnected. UART channel 0 Clear to Send or general purpose input (active low). This input should be connected to VCC when not used. UART channel 0 Data Terminal Ready or general purpose output (active low). If this output is not used, leave it unconnected. UART channel 0 Data Set Ready or general purpose input (active low). This input should be connected to VCC when not used. UART channel 0 Carrier Detect or general purpose input (active low). This input should be connected to VCC when not used.
IRDY#
I
TRDY# STOP# IDSEL DEVSEL# INTA# PAR PERR# SERR#
15 17 99 16 85 20 18 19
O O I O OD I/O O OD
MODEM OR SERIAL I/O INTERFACE TX0 RX0 73 66 O I
RTS0# CTS0# DTR0# DSR0# CD0#
71 67 72 68 69
O I O I I
3
XR17C152 5V PCI BUS DUAL UART Pin Description
NAME RI0# TX1 RX1 PIN # 70 62 55 TYPE I O I DESCRIPTION
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REV. 1.2.0
UART channel 0 Ring Indicator or general purpose input (active low). This input should be connected to VCC when not used. UART channel 1 Transmit Data or infrared transmit data. Normal TXD output idles HIGH while infrared TXD output idles LOW. UART channel 1 Receive Data or infrared receive data. Normal RXD input idles HIGH while infrared RXD input idles LOW. In the infrared mode, the polarity of the incoming RXD signal can be selected via FCTR bit-4. If this bit is a logic 0, a LOW on the RXD input is considered a mark and if this bit is a logic 1, a HIGH on the RXD input is considered a space. UART channel 1 Request to Send or general purpose output (active low). If this output is not used, leave it unconnected. UART channel 1 Clear to Send or general purpose input (active low). This input should be connected to VCC when not used. UART channel 1 Data Terminal Ready or general purpose output (active low). If this output is not used, leave it unconnected. UART channel 1 Data Set Ready or general purpose input (active low). This input should be connected to VCC when not used. UART channel 1 Carrier Detect or general purpose input (active low). This input should be connected to VCC when not used. UART channel 1 Ring Indicator or general purpose input (active low). This input should be connected to VCC when not used. Multi-purpose inputs/outputs 0-7. The function of these pin are defined thru the Configuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for reading the vendor and sub-vendor ID during power up or reset. However, it can be manually clocked thru the Configuration Register REGB. Chip select to a EEPROM device like 93C46. It is manually selectable thru the Configuration Register REGB. Requires a pull-up 4.7K ohm resister for external sensing of EEPROM during power up. See DAN112 for further details. Write data to EEPROM device. It is manually accessible thru the Configuration Register REGB. The 152 auto-configuration register interface logic uses the 16-bit format. Read data from EEPROM device. It is manually accessible thru the Configuration Register REGB. Crystal or external clock input of up to 50MHz for data rate of 3.125Mbps at 5V. See AC Characterization table. Crystal or buffered clock output. 16-bit timer/counter external clock input. Global Infrared mode enable (active high). This pin is sampled during power up, following a hardware reset (RST#) or soft-reset (register RESET). It can be used to start up both UARTs in the infrared mode. The sampled logic state is transferred to MCR bit-6 in the UART. Software can override this pin thereafter and enable or disable it. Global AutoRS485 half-duplex direction control enable (active low). During po
