Mobile Multimedia CODEC

w DESCRIPTION The WM8983 is a low power, high quality stereo CODEC designed for portable multimedia applications. Highly flexible analogue mixing functions enable new application features, combining hi-fi quality audio with voice communication. The device integrates preamps for stereo differential mics, and includes drivers for speaker, headphone and differential or stereo line output. External component requirements are reduced as no separate microphone or headphone amplifiers are required. Advanced on-chip digital signal processing includes a 5-band equaliser, a mixed signal Automatic Level Control for the microphone or line input through the ADC as well as a purely digital limiter function for record or playback. A programmable high pass filter in the ADC path is provided for wind noise reduction and an IIR with programmable coefficients can be used as a notch filter to suppress fixed-frequency noise. The WM8983 digital audio interface can operate in master or slave mode, while an integrated PLL supports flexible clocking schemes. A-law and µ-law companding are fully supported. WM8983 Mobile Multimedia CODEC with 1W Speaker Driver FEATURES Stereo CODEC: • DAC SNR 98dB, THD -84dB (‘A’ weighted @ 48kHz) • ADC SNR 95dB, THD -84dB (‘A’ weighted @ 48kHz) • Speaker driver (1W into 8Ω BTL with 5V supply) • SNR 90dB • PSRR 80dB • Headphone driver with ‘capless’ option • 40mW/channel output power into 16Ω / 3.3V AVDD2 • Pop and click suppression Mic Preamps: • Stereo Differential or mono microphone Interfaces • Programmable preamp gain • Pseudo differential inputs with common mode rejection • Programmable ALC / Noise Gate in ADC path • Low-noise bias supplied for electret microphones Other Features: • Enhanced 3-D function for improved stereo separation • Highly flexible mixing functions • 5-band equaliser (ADC or DAC path) The WM8983 operates at analogue supply voltages from 2.5V to • ADC Programmable high pass filter (wind noise reduction) 3.3V, although the digital core can operate at voltages down to • ADC Programmable IIR notch filter 1.71V to save power. Speaker supplies can operate up to www.DataSheet4U.com inputs for stereo analog input signals or ‘beep’ 5V for • Aux increased speaker output power. Additional power management • PLL supporting various clocks between 8MHz-50MHz control enables individual sections of the chip to be powered • Sample rates supported (kHz): 8, 11.025, 16, 12, 16, 22.05, down under software control. 24, 32, 44.1, 48 • 2.5V to 3.6V analogue supplies • 1.71V to 3.6V digital supplies • 2.5V to 5.5V speaker supplies • 5x5mm 32-lead QFN package APPLICATIONS • Multimedia mobile phones WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ Production Data, November 2006, Rev 4.0 Copyright ©2006 Wolfson Microelectronics plc WM8983 BLOCK DIAGRAM Production Data w PD Rev 4.0 November 2006 2 Production Data WM8983 TABLE OF CONTENTS DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................2 TABLE OF CONTENTS .........................................................................................3 PIN CONFIGURATION...........................................................................................5 ORDERING INFORMATION ..................................................................................5 PIN DESCRIPTION ................................................................................................6 ABSOLUTE MAXIMUM RATINGS.........................................................................7 RECOMMENDED OPERATING CONDITIONS .....................................................7 ELECTRICAL CHARACTERISTICS ......................................................................8 TERMINOLOGY .......................................................................................................... 13 SPEAKER OUTPUT THD VERSUS POWER ......................................................14 POWER CONSUMPTION ....................................................................................16 TYPICAL SCENARIOS................................................................................................ 16 AUDIO PATHS OVERVIEW ........................................................................................ 17 SYSTEM CLOCK TIMING ........................................................................................... 18 AUDIO INTERFACE TIMING – MASTER MODE ........................................................ 18 AUDIO INTERFACE TIMING – SLAVE MODE............................................................ 19 CONTROL INTERFACE TIMING – 3-WIRE MODE .................................................... 20 CONTROL INTERFACE TIMING – 2-WIRE MODE .................................................... 21 INTERNAL POWER ON RESET CIRCUIT ..........................................................22 RECOMMENDED POWER UP/DOWN SEQUENCE .................................................. 24 RECOMMENDED L/ROUT1 ENABLE SEQUENCE .................................................... 27 DEVICE DESCRIPTION.......................................................................................28 INTRODUCTION ......................................................................................................... 28 INPUT SIGNAL PATH ................................................................................................. 30 ANALOGUE TO DIGITAL CONVERTER (ADC).......................................................... 39 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) .......................................... 44 OUTPUT SIGNAL PATH ............................................................................................. 56 3D STEREO ENHANCEMENT .................................................................................... 63 ANALOGUE OUTPUTS............................................................................................... 63 DIGITAL AUDIO INTERFACES................................................................................... 80 AUDIO SAMPLE RATES ............................................................................................. 85 MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ............................................... 85 COMPANDING............................................................................................................ 88 GENERAL PURPOSE INPUT/OUTPUT...................................................................... 90 OUTPUT SWITCHING (JACK DETECT)..................................................................... 90 CONTROL INTERFACE.............................................................................................. 92 RESETTING THE CHIP .............................................................................................. 93 POWER SUPPLIES .................................................................................................... 93 POWER MANAGEMENT ............................................................................................ 93 REGISTER MAP...................................................................................................95 REGISTER BITS BY ADDRESS ................................................................................. 97 DIGITAL FILTER CHARACTERISTICS .............................................................114 TERMINOLOGY ........................................................................................................ 114 DAC FILTER RESPONSES....................................................................................... 115 ADC FILTER RESPONSES....................................................................................... 115 HIGHPASS FILTER................................................................................................... 116 w PD Rev 4.0 November 2006 3 WM8983 Production Data 5-BAND EQUALISER ................................................................................................ 117 APPLICATIONS INFORMATION .......................................................................121 RECOMMENDED EXTERNAL COMPONENTS ........................................................ 121 IMPORTANT NOTICE ........................................................................................123 ADDRESS: ................................................................................................................ 123 w PD Rev 4.0 November 2006 4 Production Data WM8983 PIN CONFIGURATION ORDERING INFORMATION ORDER CODE WM8983GEFL/V WM8983GEFL/RV Note: Reel quantity = 3,500 TEMPERATURE RANGE -25°C to +85°C -25°C to +85°C PACKAGE 32-lead QFN (5 x 5 mm) (pb-free) 32-lead QFN (5 x 5 mm) (pb-free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL3 MSL3 PEAK SOLDERING TEMPERATURE 260oC 260oC w PD Rev 4.0 November 2006 5 WM8983 PIN DESCRIPTION PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 NAME LIP LIN L2/GPIO2 RIP RIN R2/GPIO3 LRC BCLK ADCDAT DACDAT MCLK DGND DCVDD DBVDD CSB/GPIO1 SCLK SDIN MODE AUXL AUXR OUT4 OUT3 ROUT2 AGND2 LOUT2 AVDD2 VMID AGND1 ROUT1 LOUT1 AVDD1 MICBIAS TYPE Analogue input Analogue input Analogue input Analogue input Analogue input Analogue input Digital Input / Output Digital Input / Output Digital Output Digital Input Digital Input Supply Supply Supply Digital Input / Output Digital Input Digital Input / Output Digital Input Analogue input Analogue input Analogue Output Analogue Output