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W79E532/W79L532 Data Sheet 8-BIT MICROCONTROLLER
Table of Contents1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. GENERAL DESCRIPTION .................................................................................................................... 2 FEATURES............................................................................................................................................ 2 PIN CONFIGURATIONS ....................................................................................................................... 3 PIN DESCRIPTION ............................................................................................................................... 4 BLOCK DIAGRAM ................................................................................................................................. 5 FUNCTIONAL DESCRIPTION .............................................................................................................. 6 MEMORY ORGANIZATION .................................................................................................................. 8 INSTRUCTION .................................................................................................................................... 26
8.1
Instruction Timing .......................................................................................................... 26
POWER MANAGEMENT..................................................................................................................... 32 INTERRUPTS...................................................................................................................................... 35 PROGRAMMABLE TIMERS/COUNTERS .......................................................................................... 37
11.1 11.2 11.3 11.4
12.
Timer/Counters 0 & 1..................................................................................................... 37 Timer/Counter 2 ............................................................................................................. 40 Pulse Width Modulated Outputs (PWM)........................................................................ 43 Watchdog Timer ............................................................................................................ 46 Framing Error Detection ................................................................................................ 54 Multiprocessor Communications ................................................................................... 55
SERIAL PORT ..................................................................................................................................... 50
12.1 12.2
13. 14. 15.
TIMED ACCESS PROTECTION ......................................................................................................... 56 H/W REBOOT MODE (BOOT FROM 4K BYTES OF LDFLASH) ....................................................... 58 IN-SYSTEM PROGRAMMING ............................................................................................................ 59
15.1 15.2
16. 17. 18.
The Loader Program Locates at LDFlash Memory ....................................................... 59 The Loader Program Locates at APFlash Memory ....................................................... 59
H/W WRITER MODE........................................................................................................................... 59 SECURITY BITS.................................................................................................................................. 60 ELECTRICAL CHARACTERISTICS.................................................................................................... 61
18.1 18.2 18.3
19. 20. 21. 22.
Absolute Maximum Ratings ........................................................................................... 61 DC Characteristics......................................................................................................... 61 A.C. Characteristics ....................................................................................................... 63
TYPICAL APPLICATION CIRCUITS ................................................................................................... 68 PACKAGE DIMENSIONS.................................................................................................................... 69 APPLICATION NOTE .......................................................................................................................... 71 REVISION HISTORY........................................................................................................................... 76
-1-
Publication Release Date: November 21, 2005 Revision A5
W79E532/W79L532
1. GENERAL DESCRIPTION
The W79E(L)532 is a fast 8051 compatible microcontroller with a redesigned processor core without wasted clock and memory cycles. As a result, it executes every 8051 instruction faster than the original 8051 for the same crystal speed. Typically, the instruction executing time of W79E(L)532 is 1.5 to 3 times faster than that of traditional 8051, depending on the type of instruction. In general, the overall performance is about 2.5 times better than the original for the same crystal speed. Giving the same throughput with lower clock speed, power consumption has been improved. Consequently, the W79E(L)532 is a fully static CMOS design; it can also be operated at a lower crystal clock. The W79E(L)532 contains In-System Programmable (ISP) 128 KB bank-addressed Flash EPROM; 4KB auxiliary Flash EPROM for loader program; on-chip 1 KB MOVX SRAM; power saving modes.
2. FEATURES
• • • • • • • • • • • • • • • • • • • • 8-bit CMOS microcontroller High speed architecture of 4 clocks/machine cycle Pin compatible with standard 80C52 Instruction-set compatible with MCS-51 Four 8-bit I/O Ports; Port 0 has internal pull-up resisters enabled by software One extra 4-bit I/O port, chip select Three 16-bit Timers 7 interrupt sources with two levels of priority On-chip oscillator and clock circuitry One enhanced full duplex serial port Dual 64KB In-System Programmable Flash EPROM banks (APFlash0 and APFlash1) 4KB Auxiliary Flash EPROM for loader program (LDFlash) 256 bytes scratch-pad RAM 1 KB on-chip SRAM for MOVX instruction Programmable Watchdog Timer 6 channels of 8 bit PWM Software Reset Software programmable access cycle to external RAM/peripherals Code protection Packages: − DIP 40: W79E532A40DN, W79L532A25DN − PLCC 44: W79E532A40PN, W79L532A25PN − QFP 44: W79E532A40FN, W79L532A25FN − Lead Free (RoHS)DIP 40: W79E532A40DL, W79L532A25DL − Lead Free (RoHS)PLCC 44: W79E532A40PL, W79L532A25PL − Lead Free (RoHS)QFP 44: W79E532A40FL, W79L532A25FL -2-
W79E532/W79L532
DEVICE
OPERATING FREQUENCY
OPERATING VOLTAGE
PACKAGE NORMAL LEAD FREE(RoHS)
W79E532 W79L532
up to 40MHz up to 25MHz
4.5V ~ 5.5V 3.0V ~ 5.5V
DIP44, PLCC44, QFP44 DIP44, PLCC44, QFP44
DIP44, PLCC44, QFP44 DIP44, PLCC44, QFP44
3. PIN CONFIGURATIONS
T2, PWM0, P1.0 T2EX, PWM1, P1.1 PWM2, P1.2 PWM3, P1.3 PWM4, P1.4 PWM5, P1.5 P1.6 P1.7 RST RXD, P3.0 TXD, P3.1 INT0, P3.2 INT1, P3.3 T0, P3.4 T1, P3.5 WR, P3.6 RD, P3.7 T1, P3.5 XTAL2 XTAL1 T2, PWM0, P1.0 T2EX, PWM1, P1.1
1 2 3 4 5 6 7
40 39 38 37 36 35 34
VDD AD0, P0.0 AD1, P0.1 AD2, P0.2 AD3, P0.3 P0.4, AD4 P0.5, AD5 P0.6, AD6 P0.7, AD7 EA ALE PSEN P2.7, A15 P2.6, A14 P2.5, A13 P2.4, A12 P2.3, A11 P2.2, A10 P2.1, A9 P2.0, A8 PWM4, P1.4 PWM3, P1.3 PWM2, P1.2 T2EX, PWM1, P1.1
DIP 40-pin
8 9 10 11 12 13 14 15 16 17 18 19 20
33 32 31 30 29 28 27 26 25 24 23 22 21
T2, PWM0, P1.0
PWM4, P1.4 6
PWM3, P1.3 5
PWM2, P1.2 4
AD0, P0.0
AD1, P0.1
AD2, P0.2
AD3, P0.3
AD0, P0.0
AD1, P0.1
AD2, P0.2
AD3, P0.3
VDD
VDD
P4.2
P4.2
3
2
1
44
43
42
41
40 P0.4, AD4 P0.5, AD5 P0.6, AD6 P0.7, AD7 EA P4.1 ALE PSEN P2.7, A15 P2.6, A14 P2.5, A13
44
43
42
41
40
39
38
36
35
34
37
PWM5, P1.5 P1.6 P1.7 RST RXD, P3.0 P4.3 TXD, P3.1 INT0, P3.2 INT1, P3.3 T0, P3.4 T1, P3.5
7 8 9 10 11 12 13 14 15 16 17 18 P3.6, WR 19 P3.7, RD 20 XTAL2 21 XTAL1 22 VSS 23 P4.0 24 P2.0, A8 25 P2.1, A9 26 P2.2, A10 27 28
39 38 37 36
PWM5, P1.5 P1.6 P1.7 RST RXD, P3.0 P4.3 TXD, P3.1 INT0, P3.2 INT1, P3.3 T0, P3.4 T1, P3.5
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
33 32 31 30
P0.4, AD4 P0.5, AD5 P0.6, AD6 P0.7, AD7 EA P4.1 ALE PSEN P2.7, A15 P2.6, A14 P2.5, A13
PLCC 44-pin
35 34 33 32 31 30 29
QFP 44-pin
29 28 27 26 25 24 23
P2.3, A11
P2.4, A12
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Publication Release Date: November 21, 2005 Revision A5
P3.6, WR
P3.7, RD
XTAL2
XTAL1
VSS
P4.0
P2.0, A8
P2.1, A9
P2.2, A10
P2.3, A11
W79E532/W79L532
4. PIN DESCRIPTION
SYMBOL TYPE DESCRIPTIONS
EA
I
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of external ROM. It should be kept high to access internal ROM. The ROM address and data will not be present on the bus if EA pin is high and the program counter is within 128 KB area. Otherwise they will be present on the bus. PROGRAM STORE ENABLE: PSEN enables the external ROM data onto the Port 0 address/data bus during fetch and MOVC operations. When internal ROM access is performed, no PSEN strobe signal outputs from this pin. ADDRESS LATCH ENABLE: ALE is used to enable the address latch that separates the address from the data on Port 0. RESET: A high on this pin for two machine cycles while the oscillator is running resets the device. CRYSTAL1: This is the crystal oscillator input. This pin may be driven by an external clock. CRYSTAL2: This is the crystal oscillator output. It is the inversion of XTAL1. GROUND: Ground potential POWER SUPPLY: Supply voltage for operation. PORT 0: Port 0 is an open-drain bi-directional I/O port. This port also provides a multiplexed low order address/data bus during accesses to external memory. Port 0 has internal pull-up resisters enabled by software. PO
