Data Sheet September 1999
W3011 1 GHz Quadrature Modulator
Features
+ Guaranteed performance at 2.7 V power supply + Output power of 3 dBm into 50 Ω load (singleended) with 3 V operation + Direct RF modulation with or without offset mixer + Automatic power control (APC) capability + Accurate 90° phase shifter for carrier + Double-balanced active mixers minimize carrier feedthrough (origin offset) + Low-current sleep mode modulation of an RF carrier by I & Q baseband inputs. It is particularly suited for use in mobile and handheld cellular telephones designed to the IS-136 (North American 824 MHz to 849 MHz), PDC (Japan RCR-STD27 889 MHz to 958 MHz), and other digital personal-communications standards. The circuit block diagram is shown in Figure 1. From two LO signals, LOL and LOH, the offset mixer produces an internal LO signal, which prevents the external VCOs from being pulled by the large transmitted signal. The phase shifter splits the LO signal into two carriers with 90° phase separation and equal amplitude. These signals are fed to the in-phase (I) and quadrature-phase (Q) double-balanced mixers. The resulting signals are summed and fed into the output amplifier. This amplifier can provide 0 dBm linear output power, minimum, into a 50 Ω load. The output power can be attenuated up to 50 dB by applying a control voltage to the APC input. Nominally, the output power is at maximum (+3 dBm) with VAPC > 2.2 V, and at minimum (–50 dBm) with VAPC < 0.8 V. A CMOS/TTL-compatible logic input allows the device to be put into a powerdown mode in which less than 10 µA of supply current is consumed.
I BIAS AND CONTROL VCC ENABLE GROUND LOH IN 50 Ω
Applications
+ PDC 800 and American digital cellular mobile terminals + Cellular base stations
Description
The W3011 1 GHz Quadrature Modulator is a monolithic integrated circuit that provides direct
–π/4
RFOUT
∑
φ
+π/4 Q
LOL IN 50 Ω
APC
EXTERNAL FILTER OR DIRECT LO INPUT
Figure 1. Circuit Block Diagram
W3011 1 GHz Quadrature Modulator
Data Sheet September 1999
Pin Information
IP IN QP QN APC GND ENABLE GND LC1 LC2 1 2 3 4 5 6 7 8 9 10 TOP VIEW 20 19 18 17 16 15 14 13 12 11 VCC VCCRF GND RFOUT GND GND LOLP LOLN LOHP LOHN
Figure 2. Pin Configuration Table 1. Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name IP IN QP QN APC GND ENABLE GND LC1 LC2 LOHN LOHP LOLN LOLP GND GND RFOUT GND VCCRF VCC Function Differential Baseband Input (in-phase) Differential Baseband Input (in-phase) Differential Baseband Input (quad-phase) Differential Baseband Input (quad-phase) Automatic Power Control dc Input dc Ground Logic Enable dc Ground Differential LO Input/External Filter Differential LO Input/External Filter Differential High-frequency Local Oscillator Input Differential High-frequency Local Oscillator Input Differential Low-frequency Local Oscillator Input Differential Low-frequency Local Oscillator Input dc Ground dc Ground Open-collector RF Output dc Ground Positive Power Supply for RF Output Stage Positive Power Supply (nonoutput circuits)
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Lucent Technologies Inc.
Data Sheet September 1999
W3011 1 GHz Quadrature Modulator
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only, as shown in Table 2. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Table 2. Absolute Maximum Ratings Parameter Ambient Operating Temperature Storage Temperature Lead Temperature (soldering, 10 s) Positive Supply Voltage Power Dissipation ac p-p Input Voltage Digital Voltages Symbol TA Tstg — VCC PD Vp-p — Min –35 –65 — –0.3 — –0.3 –0.3 Max 85 150 300 4.5 650 VCC VCC Unit °C °C °C V mW V V
Handling Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid exposure to electrostatic discharge (ESD) during handling and mounting. Lucent Technologies Microelectronics Group employs a human-body model (HBM) and a charged-device model (CDM) for ESD-susceptibility testing and protection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used to define the model. No industry-wide standard has been adopted for CDM. However, a standard HBM (resistance = 1500 Ω, capacitance = 100 pF) is widely used and, therefore, can be used for comparison purposes. The HBM ESD threshold presented here was obtained by using these circuit parameters: ESD Threshold Voltage Model HBM CDM (corner pins) CDM (noncorner pins) Rating 2000 500 500
Lucent Technologies Inc.
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W3011 1 GHz Quadrature Modulator
Data Sheet September 1999
Operating Ranges
The W3011 operating ranges are shown in Table 3. Performance is not guaranteed over the full range of all conditions possible within this table. However, the table lists the ranges of external conditions in which the W3011 provides general functionality, which may be useful in specific applications, without risk of permanent damage. The conditions for guaranteed performance are described in Tables 4 and 5. Table 3. Operating Ranges Parameter VCC Ambient Operating Temperature f LO Direct Mode (pins 9 and 10) PLO Direct Mode (pins 9 and 10) Offset Local Oscillator (LOL) Frequency LOL Input Level UHF Local Oscillator (LOH) Frequency LOH Input Level
External dc Bias Voltage for I & Q Inputs with 0.282 Vrms ac Input Level: Differential ac Input
Min 2.7 –35 800 110 50 –15 100 –15
Max 3.6 85 1000 600 800 –3 1300 –3
Unit Vdc °C MHz mVp-p MHz dBm MHz dBm
1.2
VCC – 0.7
Vdc
Electrical Characteristics
Table 4. dc and Digital Electrical Specifications Conditions unless otherwise noted: 2.7 ≤ VCC ≤ 3.3 Vdc; TA = 25 °C ± 3 °C; RL = 50 Ω, VAPC = 2.7 Vdc; f RF = 900 MHz, fLOL = 130 MHz, fLOH = 1030 MHz, –13 dBm < PLOL, PLOH < –5 dBm; I – I = 0.4 cos(2πt Ÿ 80 kHz), Q – Q = 0.4 cos(2πt Ÿ 80 kHz – π/2), Vbias of I, I , Q, and Q = 1.22 Vdc. Parameter Enable Input Logic High Voltage Logic Low Voltage Logic High Current (VIH = 3.3 V) Logic Low Current (VIL = 0.4 V) Powerup/down (after ENABLE change) Power Supply Current Powerdown (ENB = 0) Transmit (ENB = VCC): (offset mixer on, APC @ max power) (offset mixer off, APC @ max power) Transmit (ENB = VCC): (offset mixer on, APC @ POUT < PMAX – 10 dB) (offset mixer off, APC @ POUT < PMAX – 10 dB) IPDN ICC(on) ICC(on) — — — — — — — 0.3 52 50 46 43 50 66 64 — — µA mA mA mA mA VIH VIL IIH IIL — 0.7 VCC GND – 0.4 — — — — — — — — VCC + 0.4 0.3 VCC 10 10 4 V V µA µA µs Symbol Min Typ Max Unit
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Lucent Technologies Inc.
Data Sheet September 1999
W3011 1 GHz Quadrature Modulator
Electrical Characteristics (continued)
Table 5. ac Specifications Conditions unless otherwise noted: 2.7 ≤ VCC ≤ 3.3 Vdc; TA = 25 °C ± 3 °C; RL = 50 Ω, VAPC = 2.7 Vdc; f RF = 900 MHz, fLOL = 130 MHz, fLOH = 1030 MHz, –15 dBm < PLOL, PLOH < –5 dBm; I – I = 0.4 cos(2πt Ÿ 80 kHz), Q – Q = 0.4 cos(2πt Ÿ 80 kHz – π/2), Vbias of I, I , Q, and Q = 1.22 Vdc. Parameter I&Q I & Q Signal Path 0.5 dB Bandwidth I & Q Input Resistance I & Q Input Capacitance to Ground I & Q Input Differential Signal for Max Output Offset Mixer LOL Input Impedance LOH Input Impedance LO Input Impedance (pins LC1, LC2) LOL Input IP3 Modulation Accuracy (POUT = –1 dBm) Carrier Suppression (POUT = –1 dBm) Carrier Suppression (entire usable APC range) Origin Offset (DQPSK inputs, all usable APC levels) Error Vector Magnitude (See Explanation of Error Vector Magnitude (EVM) Testing section.) Lower Sideband (LSB) Suppression (See Figure 3.) RF Output Output Power (0.8 Vp-p differential or single-ended 80 kHz sine-wave inputs to I and Q, with 90° between I and Q) Adjacent Channel Suppression (0.282 Vrms differential I and Q inputs, π/4 – DQPSK modulation, random data): Per PDC (RCR STD-27): ±50 kHz, All Usable APC Levels ±100 kHz, All Usable APC Levels ±100 kHz, Max RF Output (APC > 2.2) Per IS-136/IS-137 800 MHz Digital Mode: ±30 kHz, All Usable APC Levels ±60 kHz, All Usable APC Levels Noise Floor Suppression, FC ± >100 kHz APC (Automatic Power Control) Function Range of Usable Output Power Control for Japan PDC (RCR STD-27), from Max Power at APC = 2.7 V to Minimum APC Voltage Where Requirements for ACP and Carrier Suppression Are Still Met Using π/4 – DQPSK/α = 0.5 Modulation at 0.282 Vrms Differential I and Q Inputs: Offset Mixer Not Used Offset Mixer Used Output Power Variation Due to Temperature, within Usable Control Range RF Power Change Time (after APC change) APC Voltage for Max Output Power APC Voltage for Min Output Power Min — — — — — — — — — — — — — –1 Typ 5 200 5 0.8 50 50 480//1 10 –35 — — 2.5 –43 3 Max — — — — — — — — –28 –26 –23 5 –34 — Unit MHz kΩ pF Vp-p Ω Ω Ω//pF dBm dBUSB dBUSB dBc % dBUSB dBm
— — — — — —
–65 — –75 –45 –60 –120
–55 –62 –65 –36 –50 –112
dBc dBc dBc dBc dBc dBc/Hz
29 39 — — — —
40 45 4 — 2.2 0.8
— — 6 2 — —
dB dB dB µs Vdc Vdc
Lucent Technologies Inc.
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W3011 1 GHz Quadrature Modulator
Data Sheet September 1999
Explanation of Error Vector Magnitude (EVM) Testing
Error vector magnitude (EVM) is estimated by feeding signals to the W3011 as described above in Table 5. A typical narrowband, sine-wave modulation output spectrum appears in Figure 3.
USB 0 dBm
0 –10 MAGNITUDE (dBm) –20 –30 –40 –50 –60 –70 –80 899.60 899.68 899.76 899.84 899.92 900 L5 –72 dBm L2 –70 dBm L3 –48 dBm LSB –38 dBm
fl = fQ = 80 kHz fLOL = 130 MHz fLOH = 1030 MHz
Fc –40 dBm U2 –50 dBm U5 –62 dBm U4 –70 dBm
L4 –75 dBm
U3 –72 dBm
900.08
900.16