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Part Number |
UC3845 |
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Manufacturer |
ON Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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UC3844, UC3845, UC2844, UC2845 High Performance Current Mode Controllers
The UC3844, UC3845 series are high performance fixed frequency current mode controllers. They are specifically designed for Off−Line and DC−to−DC converter applications offering the designer a cost effective solution with minimal external components. These integrated circuits feature an oscillator, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totem pole output ideally suited for driving a power MOSFET. Also included are protective features consisting of input and reference undervoltage lockouts each with hysteresis, cycle−by−cycle current limiting, a latch for single pulse metering, and a flip−flop which blanks the output off every other oscillator cycle, allowing output dead times to be programmed for 50% to 70%. These devices are available in an 8−pin dual−in−line plastic package as well as the 14−pin plastic surface mount (SOIC−14). The SOIC−14 package has separate power and ground pins for the totem pole output stage. The UCX844 has UVLO thresholds of 16 V (on) and 10 V (off), ideally suited for off−line converters. The UCX845 is tailored for lower voltage applications having UVLO thresholds of 8.5 V (on) and 7.6 V (off).
Features
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PDIP−8 N SUFFIX CASE 626 1 14 1 8 1 SOIC−14 D SUFFIX CASE 751A SOIC−8 D1 SUFFIX CASE 751A
8
PIN CONNECTIONS
Compensation 1 Voltage Feedback 2 Current Sense 3 RT/CT 4 (Top View) 8 7 6 5 Vref VCC Output GND
• • • • • • • • • •
Current Mode Operation to 500 kHz Output Switching Frequency Output Deadtime Adjustable from 50% to 70% Automatic Feed Forward Compensation Latching PWM for Cycle−By−Cycle Current Limiting Internally Trimmed Reference with Undervoltage Lockout High Current Totem Pole Output Input Undervoltage Lockout with Hysteresis Low Startup and Operating Current Direct Interface with ON Semiconductor SENSEFETt Products Pb−Free Packages are Available
VCC Vref 8(14) R R RTCT 4(7) Vref Undervoltage Lockout Oscillator Flip Flop & Latching PWM 5.0V Reference 7(12)
Compensation NC Voltage Feedback NC Current Sense NC RT/CT
1 2 3 4 5 6 7 (Top View)
14 Vref 13 NC 12 VCC 11 VC 10 Output 9 8 GND Power Ground
VCC Undervoltage Lockout VC
7(11)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet.
Output 6(10) PWR GND 5(8) Current Sense 3(5)
Voltage Feedback 2(3) 1(1) Output Comp.
+ −
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page page 14 of this data sheet.
Error Amplifier
GND 5(9) Pin numbers in parenthesis are for the D suffix SOIC−14 package.
Figure 1. Simplified Block Diagram
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 7
1
Publication Order Number: UC3844/D
UC3844, UC3845, UC2844, UC2845
MAXIMUM RATINGS
Rating Total Power Supply and Zener Current Output Current, Source or Sink (Note 1) Output Energy (Capacitive Load per Cycle) Current Sense and Voltage Feedback Inputs Error Amp Output Sink Current Power Dissipation and Thermal Characteristics D Suffix, Plastic Package, Case 751A Maximum Power Dissipation @ TA = 25°C Thermal Resistance Junction−to−Air N Suffix, Plastic Package, Case 626 Maximum Power Dissipation @ TA = 25°C Thermal Resistance Junction−to−Air Operating Junction Temperature Operating Ambient Temperature UC3844, UC3845 UC2844, UC2845 Storage Temperature Range Symbol (ICC + IZ) IO W Vin IO Value 30 1.0 5.0 − 0.3 to + 5.5 10 Unit mA A mJ V mA
PD RqJA PD RqJA TJ TA
862 145 1.25 100 + 150 0 to + 70 − 25 to + 85 − 65 to + 150
mW °C/W W °C/W °C °C
Tstg
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Maximum Package power dissipation limits must be observed.
ELECTRICAL CHARACTERISTICS (VCC = 15 V, (Note 2), RT = 10 k, CT = 3.3 nF, TA = Tlow to Thigh (Note 3), unless otherwise noted.)
UC284X Characteristics REFERENCE SECTION Reference Output Voltage (IO = 1.0 mA, TJ = 25°C) Line Regulation (VCC = 12 V to 25 V) Load Regulation (IO = 1.0 mA to 20 mA) Temperature Stability Total Output Variation over Line, Load, Temperature Output Noise Voltage (f = 10 Hz to kHz, TJ = 25°C) Long Term Stability (TA = 125°C for 1000 Hours) Output Short Circuit Current OSCILLATOR SECTION Frequency TJ = 25°C TA = Tlow to Thigh Frequency Change with Voltage (VCC = 12 V to 25 V) Frequency Change with Temperature TA = Tlow to Thigh Oscillator Voltage Swing (Peak−to−Peak) Discharge Current (Vosc = 2.0 V, TJ = 25°C) ERROR AMPLIFIER SECTION Voltage Feedback Input (VO = 2.5 V) Input Bias Current (VFB = 2.7 V) Open Loop Voltage Gain (VO = 2.0 V to 4.0 V) VFB IIB AVOL 2.45 − 65 2.5 −0.1 90 2.55 −1.0 − 2.42 − 65 2.5 −0.1 90 2.58 −2.0 − V mA dB fosc 47 46 − − − − 52 − 0.2 5.0 1.6 10.8 57 60 1.0 − − − 47 46 − − − − 52 − 0.2 5.0 1.6 10.8 57 60 1.0 − − − kHz Vref Regline Regload TS Vref Vn S ISC 4.95 − − − 4.9 − − − 30 5.0 2.0 3.0 0.2 − 50 5.0 − 85 5.05 20 25 − 5.1 − − − 180 4.9 − − − 4.82 − − − 30 5.0 2.0 3.0 0.2 − 50 5.0 − 85 5.1 20 25 − 5.18 − − − 180 V mV mV mV/°C V mV mV mA Symbol Min Typ Max Min UC384X Typ Max Unit
Dfosc/DV Dfosc/DT Vosc Idischg
% % V mA
2. Adjust VCC above the Startup threshold before setting to 15 V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Thigh = +70°C for UC3844, UC3845 Tlow = 0°C for UC3844, UC3845 −25°C for UC2844, UC2845 +85°C for UC2844, UC2845
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UC3844, UC3845, UC2844, UC2845
ELECTRICAL CHARACTERISTICS (VCC = 15 V, (Note 4), RT = 10 k, CT = 3.3 nF, TA = Tlow to Thigh (Note 5), unless otherwise noted.)
UC284X Characteristics ERROR AMPLIFIER SECTION (continued) Unity Gain Bandwidth (TJ = 25°C) Power Supply Rejection Ratio (VCC = 12 V to 25 V) Output Current Sink (VO = 1.1 V, VFB = 2.7 V) Source (VO = 5.0 V, VFB = 2.3 V) Output Voltage Swing High State (RL = 15 k to ground, VFB = 2.3 V) Low State (RL = 15 k to Vref, VFB = 2.7 V) CURRENT SENSE SECTION Current Sense Input Voltage Gain (Notes 6 & 7) Maximum Current Sense Input Threshold (Note 6) Power Supply Rejection Ratio VCC = 12 V to 25 V (Note 6) Input Bias Current Propagation Delay (Current Sense Input to Output) OUTPUT SECTION Output Voltage Low State (ISink = 20 mA) (ISink = 200 mA) High State (ISink = 20 mA) (ISink = 200 mA) Output Voltage with UVLO Activated VCC = 6.0 V, ISink = 1.0 mA Output Voltage Rise Time (CL = 1.0 nF, TJ = 25°C) Output Voltage Fall Time (CL = 1.0 nF, TJ = 25°C) UNDERVOLTAGE LOCKOUT SECTION Startup Threshold UCX844 UCX845 Minimum Operating Voltage After Turn−On UCX844 UCX845 PWM SECTION Duty Cycle Maximum Minimum TOTAL DEVICE Power Supply Current (Note 4) Startup: (VCC = 6.5 V for UCX845A, (VCC 14 V for UCX844) Operating Power Supply Zener Voltage (ICC = 25 mA) ICC − − VZ 30 0.5 12 36 1.0 17 − − − 30 0.5 12 36 1.0 17 − V mA % DCmax DCmin 46 − 48 − 50 0 47 − 48 − 50 0 Vth V 15 7.8 9.0 7.0 16 8.4 10 7.6 17 9.0 11 8.2 14.5 7.8 8.5 7.0 16 8.4 10 7.6 17.5 9.0 V 11.5 8.2 V VOL VOH VOL(UVLO) tr tf − − 12 12 − − − 0.1 1.6 13.5 13.4 0.1 50 50 0.4 2.2 − − 1.1 150 150 − − 13 12 − − − 0.1 1.6 13.5 13.4 0.1 50 50 0.4 2.2 − − V 1.1 150 150 ns ns AV Vth PSRR − IIB tPLH(IN/OUT) − − 70 −2.0 150 − −10 300 − − − 70 −2.0 150 − −10 300 mA ns 2.85 0.9 3.0 1.0 3.15 1.1 2.85 0.9 3.0 1.0 3.15 1.1 V/V V dB BW PSRR ISink ISource VOH VOL 0.7 60 2.0 −0.5 5.0 − 1.0 70 12 −1.0 6.2 0.8 − − − − − 1.1 0.7 60 2.0 −0.5 5.0 − 1.0 70 12 −1.0 6.2 0.8 − − − − V − 1.1 MHz dB mA Symbol Min Typ Max Min UC384X Typ Max Unit
VCC(min)
4. Adjust VCC above the Startup threshold before setting to 15 V. 5. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Thigh = +70°C for UC3844, UC3845 Tlow = 0°C for UC3844, UC3845 −25°C for UC2844, UC2845 +85°C for UC2844, UC2845 6. This parameter is measured at the latch trip point with VFB = 0 V. 7. Comparator gain is defined as: AV
DV Output Compensation DV Current Sense Input
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UC3844, UC3845, UC2844, UC2845
% DT, PERCENT OUTPUT DEADTIME 10 0 50 20 10 5.0 2.0 75
VCC = 15 V TA = 25°C
RT, TIMING RESISTOR (k Ω )
70 65
CT = 10 nF 5.0 nF
1.0 nF 2.0 nF
60 55 50 10 k
500 pF
NOTE: Output switches at one−half the oscillator frequency.
1.0 10 k
100 pF 200 pF
20 k
50 k
100 k
200 k
500 k
1.0 M
20 k
50 k
100 k
200 k
500 k
1.0 M
fosc, OSCILLATOR FREQUENCY (Hz)
fosc, OSCILLATOR FREQUENCY (Hz)
Figure 2. Timing Resistor versus Oscillator Frequency
Figure 3. Output Deadtime versus Oscillator Frequency
2.55 V
VCC = 15 V AV = −1.0 TA = 25°C
3.0 V
VCC = 15 V AV = −1.0 TA = 25°C
20 mV/DIV
2.5 V
2.5 V
2.45 V 0.5 ms/DIV
2.0 V 1.0 ms/DIV
Figure 4. Error Amp Small Signal Transient Response
Figure 5. Error Amp Large Signal Transient Response
A VOL , OPEN LOOP VOLTAGE GAIN (dB)
100 80 Gain 60 40 Phase 20 0 VCC = 15 V VO = 2.0 V to 4.0 V RL = 100 K TA = 25°C
Vth, CURRENT SENSE INPUT THRESHOLD (V)
0 30 60 90 120 150 φ EXCESS PHASE (DEGREES) ,
1.2 VCC = 15 V 1.0 0.8 0.6 TA = 125°C 0.4 0.2 0 TA = −55°C TA = 25°C
− 20 10
100
1.0 k
10 k
100 k
1.0 M
180 10 M
0
f, FREQUENCY (Hz)
2.0 4.0 6.0 VO, ERROR AMP OUTPUT VOLTAGE (V)
8.0
Figure 6. Error Amp Open Loop Gain and Phase versus Frequency
Figure 7. Current Sense Input Threshold versus Error Amp Output Voltage
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200 mV/DIV
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