application INFO available
UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A
Current Mode PWM Controller
FEATURES
• • • • • • • • • • • • Optimized for Off-line and DC to DC Converters Low Start Up Current (<0.5mA) Trimmed Oscillator Discharge Current Automatic Feed Forward Compensation Pulse-by-Pulse Current Limiting Enhanced Load Response Characteristics Under-Voltage Lockout With Hysteresis Double Pulse Suppression
Part # UVLO On 16.0V 8.5V 16.0V 8.5V UVLO Off 10.0V 7.9V 10.0V 7.9V Maximum Duty Cycle <100% <100% <50% <50%
DESCRIPTION
The UC1842A/3A/4A/5A family of control ICs is a pin for pin compatible improved version of the UC3842/3/4/5 family. Providing the necessary features to control current mode switched mode power supplies, this family has the following improved features. Start up current is guaranteed to be less than 0.5mA. Oscillator discharge is trimmed to 8.3mA. During under voltage lockout, the output stage can sink at least 10mA at less than 1.2V for VCC over 5V. The difference between members of this family are shown in the table below.
High Current Totem Pole Output
UC1842A
Internally Trimmed Bandgap Reference 500kHz Operation Low RO Error Amp
UC1843A UC1844A UC1845A
BLOCK DIAGRAM
Note 1: A/B A = DIL-8 Pin Number. B = SO-14 Pin Number. Note 2: Toggle flip flop used only in 1844A and 1845A.
SLUS224A - SEPTEMBER 1994 - REVISED APRIL 2002
CONNECTION DIAGRAMS ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . 30V Supply Voltage (ICC mA) . . . . . . . . . . . . . . . . . . . . Self Limiting Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A Output Energy (Capacitive Load). . . . . . . . . . . . . . . . . . . . . 5µJ Analog Inputs (Pins 2, 3). . . . . . . . . . . . . . . . . . . -0.3V to +6.3V Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . 10mA Power Dissipation at TA ≤ 25°C (DIL-8) . . . . . . . . . . . . . . . . 1W Storage Temperature Range . . . . . . . . . . . . . . -65°C to +150°C Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300°C Note 1. All voltages are with respect to Ground, Pin 5. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. Pin numbers refer to DIL package only.
UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A
PLCC-20, LCC-20 (TOP VIEW) Q, L Packages
PACKAGE PIN FUNCTION FUNCTION PIN N/C 1 Comp 2 N/C 3-4 VFB 5 N/C 6 ISENSE 7 N/C 8-9 RT/CT 10 N/C 11 Pwr Gnd 12 Gnd 13 N/C 14 Output 15 N/C 16 VC 17 VCC 18 N/C 19 VREF 20
SOIC-14 (TOP VIEW) D Package
DIL-8, SOIC-8 (TOP VIEW) J or N, D8 Package
SOIC-WIDE16 (TOP VIEW) DW Package
N/C N/C COMP VFB ISENSE RT/CT N/C N/C 1 2 3 4 5 6 7 8 16 N/C 15 VREF 14 VCC 13 VCC 12 OUTPUT 11 GND 10 PWRGND 9 N/C
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UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for –55°C ≤ TA ≤ 125°C for the UC184xA; –40°C ≤ TA ≤ 125°C for the UC284xAQ; –40°C ≤ TA ≤ 85°C for the UC284xA; 0 ≤ TA ≤ 70°C for the UC384xA; VCC = 15V (Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8.
PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Temp. Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit Oscillator Section Initial Accuracy Voltage Stability Temp. Stability Amplitude Discharge Current Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT High VOUT Low Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output Output Section Output Low Level Output High Level Rise Time Fall Time UVLO Saturation TEST CONDITIONS UC184xAUC284xA MIN. TYP. MAX. 4.95 5.00 6 6 0.2 5.05 20 25 0.4 5.1 MIN. 4.90 UC384xA UNITS TYP. MAX. 5.00 6 6 0.2 5.10 20 25 0.4 5.18 V mV mV mV/°C V µV mV mA kHz % % V mA mA V µA dB MHz dB mA mA V V V/V V dB µA ns V V V V ns ns V
TJ = 25°C, IO = 1mA 12 ≤ VIN 25V 1 ≤ IO ≤ 20mA (Note 2, Note 7) Line, Load, Temp. 10Hz ≤ f ≤ 10kHz TJ = 25°C (Note 2) TA = 125°C, 1000Hrs. (Note 2)
4.9 50 5 -100 52 0.2 5 1.7 8.3
4.82 50 5 -100 52 0.2 5 1.7 8.3
-30 TJ = 25°C (Note 6) 12 ≤ VCC ≤ 25V TMIN ≤ TA ≤ TMAX (Note 2) VPIN 4 peak to peak (Note 2) TJ = 25°C, VPIN 4 = 2V (Note 8) VPIN 4 = 2V (Note 8) VPIN 1 = 2.5V 2 ≤ VO ≤ 4V TJ = 25°C (Note 2) 12 ≤ VCC ≤ 25V VPIN 2 = 2.7V, VPIN 1 = 1.1V VPIN 2 = 2.3V, VPIN 1 = 5V VPIN 2 = 2.3V, RL = 15k to ground VPIN 2 = 2.7V, RL = 15k to Pin 8 (Note 3, Note 4) VPIN 1 = 5V (Note 3) 12 ≤ VCC ≤ 25V (Note 3) VPIN 3 = 0 to 2V (Note 2) ISINK = 20mA ISINK = 200mA ISOURCE = 20mA ISOURCE = 200mA TJ = 25°C, CL = 1nF (Note 2) TJ = 25°C, CL = 1nF (Note 2) VCC = 5V, ISINK = 10mA 47
25 -180 57 1
-30 47
25 -180 57 1
7.8 7.5 2.45 65 0.7 60 2 -0.5 5
8.8 8.8 2.55 -1
7.8 7.6 2.42 65 0.7 60 2 -0.5 5
8.8 8.8 2.58 -2
2.50 -0.3 90 1 70 6 -0.8 6 0.7 3 1 70 -2 150 0.1 15 13.5 13.5 50 50 0.7
1.1 3.15 1.1 -10 300 0.4 2.2 13 12 150 150 1.2 2.85 0.9
2.50 -0.3 90 1 70 6 -0.8 6 0.7 3 1 70 -2 150 0.1 15 13.5 13.5 50 50 0.7
1.1 3.15 1.1 -10 300 0.4 2.2
2.85 0.9
13 12
150 150 1.2
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UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for –55°C ≤ TA ≤ 125°C for the UC184xA; –40°C ≤ TA ≤ 125°C for the UC284xAQ; –40°C ≤ TA ≤ 85°C for the UC284xA; 0 ≤ TA ≤ 70°C for the UC384xA; VCC = 15V (Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8.
PARAMETER Under-Voltage Lockout Section Start Threshold Min. Operation Voltage After Turn On PWM Section Maximum Duty Cycle Minimum Duty Cycle Total Standby Current Start-Up Current Operating Supply Current VCC Zener Voltage TEST CONDITIONS UC184xAUC284xA MIN. TYP. MAX. 15 7.8 9 7.0 94 47 16 8.4 10 7.6 96 48 17 9.0 11 8.2 100 50 0 0.5 17 30 UC384xA UNITS MIN. TYP. MAX. 14.5 7.8 8.5 7.0 94 47 16 8.4 10 7.6 96 48 17.5 9.0 11.5 8.2 100 50 0 0.5 17 V V V V % % % mA mA V
x842A/4A x843A/5A x842A/4A x843A/5A x842A/3A x844A/5A
VPIN 2 = VPIN 3 = 0V ICC = 25mA
30
0.3 11 34
0.3 11 34
Note 2: Ensured by design, but not 100% production tested. Note 3: Parameter measured at trip point of latch with VPIN2 = 0. ∆VPIN 1 ; 0 VPIN 3 0.8V. Note 4: Gain defined as: A = ∆VPIN 3 Note 5: Adjust VCC above the start threshold before setting at 15V. Note 6: Output frequency equals oscillator frequency for the UC1842A and UC1843A. Output frequency is one half oscillator frequency for the UC1844A and UC1845A. Note 7: “Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation: VREF (max ) − VREF (min ) .VREF (max) and VREF (min) are the maximum & minimum reference voltTemp Stability = TJ (max ) − TJ (min ) age measured over the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature.” Note 8: This parameter is measured with RT = 10k to VREF.This contributes approximately 300 A of current to the measurement. The total current flowing into the RT/C pin will be approximately 300 A higher than the measured value.
Error Amp Configuration
Error Amp can Source and Sink up to 0.5mA, and Sink up to 2mA.
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UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A
Under-Voltage Lockout
During UVLO, the Output is low.
Current Sense Circuit
Peak Current (IS) is Determined By The Formula 1.0V ISMAX ′ RS A small RC filter may be required to suppress switch transients.
Output Saturation Characteristics
Error Amplifier Open-Loop Frequency Response
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APPLICATIONS DATA (cont.)
Oscillator Section
Oscillator Frequency vs Timing Resistance
UC1842A/3A/4A/5A UC2842A/3A/4A/5A
Maximum Duty Cycle vs Timing Resistor
Open-Loop Laboratory Test Fixture
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in a single point
ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.
Slope Compensation
A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for converters requiring duty cycles over 50%. Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes.
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APPLICATIONS DATA (cont.)
Off-line Flyback Regulator
UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A
Power Supply Specifications
1. Input Voltage 2. Line Isolation 3. Switching Frequency 4. Efficiency Full Load
95VAC to 130VA (50 Hz/60Hz) 3750V 40kHz 70%
5. Output Voltage: A. +5V, ± 5%; 1A to 4A load Ripple voltage: 50mV P-P Max B. +12V, ± 3%; 0.1A to 0.3A load Ripple voltage: 100mV P-P Max C. -12V ,± 3%; 0.1A to 0.3A load Ripple voltage: 100mV P-P Max
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Mar-2005
PACKAGING INFORMATION
Orderable Device 5962-8670405PA 5962-8670405VPA 5962-8670405VXA 5962-8670405XA 5962-8670406PA 5962-8670406VPA 5962-8670406VXA 5962-8670406XA 5962-8670407PA 5962-8670407VPA 5962-8670407VXA 5962-8670407XA 5962-8670408PA 5962-8670408VPA 5962-8670408VXA 5962-8670408XA UC1842AJ UC1842AJ883B UC1842AJQMLV UC1842AL883B UC1842ALQMLV UC1843AJ UC1843AJ883B UC1843AJQMLV UC1843AL883B UC1843ALQMLV UC1844AJ UC1844AJ883B UC1844AJQMLV UC1844AL883B UC1844ALQMLV UC1845AJ UC1845AJ883B UC1845AJQMLV UC1845AL883B UC1845ALQMLV UC2842AD UC2842AD8 UC2842AD8TR UC2842AD8TRG4 UC2842ADTR UC2842ADW Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE A
