4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER

www.DataSheet4U.com www.ti.com TVP5154 4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK SLES163A – MARCH 2006 – REVISED JULY 2006 1 Introduction 1.1 Features • Four Separate Video Decoder Channels With Features for Each Channel: – Accept NTSC (M, 4.43), PAL (B, D, G, H, I, M, N), and SECAM (B, D, G, K, K1, L) Video Data – Support ITU-R BT.601 Standard Sampling – High-Speed 9-Bit Analog-to-Digital Converter (ADC) – Two Composite Inputs or One S-video Input (for Each Channel) – Fully Differential CMOS Analog Preprocessing Channels With Clamping and Automatic Gain Control (AGC) for Best Signal to Noise (SNR) Performance – Brightness, Contrast, Saturation, Hue, and Sharpness Control Through Inter-Integrated Circuit (I2C) – Complementary 4-Line (3-H Delay) Adaptive Comb Filters for Both Cross-Luminance and Cross-Chrominance Noise Reduction – Patented Architecture for Locking to Weak, Noisy, or Unstable Signals Four Independent Polymorphic Scalers Single or Concurrent Scaled and Unscaled Outputs Via Dual Clocking Data, Interleaved 54-MHz Data or Single 27-MHz Clock Scaled/Unscaled Image Toggle Mode Gives Variable Field Rate for Both Scaled and Unscaled Video Low Power Consumption: 700 mW Typical 128-Pin Thin Quad Flat Pack (TQFP) Package Single 14.31818-MHz Crystal for All Standards and All Channels • Internal Phase-Locked Loop (PLL) for Line-Locked Clock (Separate for Each Channel) and Sampling Sub-Carrier Genlock Output for Synchronizing Color Sub-Carrier of External Encoder Standard Programmable Video Output Format – ITU-R BT.656, 8-Bit 4:2:2 With Embedded Syncs – 8-Bit 4:2:2 With Discrete Syncs Advanced Programmable Video Output Formats – 2× Over-Sampled Raw Vertical Blanking Interval (VBI) Data During Active Video – Sliced VBI Data During Horizontal Blanking or Active Video VBI Modes Supported: – Teletext (NABTS, WST) – Closed-Caption Decode With FIFO, and Extended Data Services (EDS) – Wide Screen Signaling (WSS), Video Program System (VPS), Copy Generation Management System (CGMS), Vertical Interval Time Code (VITC) – Gemstar 1×/2× Electronic Program Guide Compatible Mode – Custom Configuration Mode Allows User to Program the Slice Engine for Unique VBI Data Signals Improved Fast Lock Mode Can Be Used When Input Video Standard Is Known and Signals on Switching Channels Are Clean Four Possible I2C Addresses Allowing 16 Decoder Channels on a Single I2C Bus • • • • • • • • • • • • 1.2 • Applications The following is a partial list of suggested applications: – Security Camera Systems – Large Format Video Wall Displays – Games Systems Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2006, Texas Instruments Incorporated TVP5154 4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK SLES163A – MARCH 2006 – REVISED JULY 2006 www.ti.com 1.3 Description The TVP5154 device is a 4-channel, low-power, NTSC/PAL/SECAM video decoder. Available in a space-saving 128-pin thin quad flat pack (TQFP) package, each channel of the TVP5154 decoder converts NTSC, PAL, or SECAM video signals to 8-bit ITU-R BT.656 format. Discrete syncs are also available. All four channels of the TVP5154 are independently controllable. The decoders share one crystal for all channels and for all supported standards. The TVP5154 can be programmed using a single inter-integrated circuit (I2C) serial interface. The decoder uses a 1.8-V supply for its analog and digital supplies, and a 3.3-V supply for its I/O. The optimized architecture of the TVP5154 decoder allows for low power consumption. The decoder consumes less than 720 mW of power in typical operation. Each channel of the TVP5154 is an independent video decoder with a programmable polymorphic scaler. Each channel converts baseband analog video into digital YCbCr 4:2:2 component video, which can then be scaled down to any resolution to 1/256 vertical and 15-bit horizontal in 2-pixel decrements. Composite and S-video inputs are supported. Each channel includes one 9-bit analog-to-digital converter (ADC) with 2× sampling. Sampling is ITU-R BT.601 (27.0) MHz, generated from a single 14.31818-MHz crystal or oscillator input) and is line locked. The output formats can be 8-bit 4:2:2 with discrete syncs or 8-bit ITU-R BT.656 with embedded synchronization. The TVP5154 utilizes Texas Instruments patented technology for locking to weak, noisy, or unstable signals. A real-time control (RTC) output is generated for each channel for synchronizing downstream video encoders. Complementary 4-line adaptive comb filtering is available per channel for both the luma and chroma data paths to reduce both cross-luma and cross-chroma artifacts. A chroma trap filter also is available. An improved fast lock mode can be used when the input video standard is known and the signals on the switching channels are clean. Note, switching from snow and/or noisy channels to good channels takes longer. In fast lock mode, video lock is achieved in three fields or less. Video characteristics, including hue, contrast, brightness, saturation, and sharpness, may be independently programmed for each channel using the industry standard I2C serial interface. The TVP5154 generates synchronization, blanking, lock, and clock signals in addition to digital video outputs for each channel. The TVP5154 includes methods for advanced vertical blanking interval (VBI) data retrieval. The VBI data processor slices, parses, and performs error checking on teletext, closed caption, and other data in several formats. I2C commands can be sent to one or more decoder cores simultaneously, reducing the amount of I2C activity necessary to configure each core. A register controls which decoder core receives I2C commands, and can be configured such that all four decoders receive commands at the same time. The main blocks for each of the channels of the TVP5154 decoder include: • Robust sync detector • ADC with analog processor • Y/C separation using 4-line adaptive comb filter • Independent, concurrent scaler outputs • Chrominance processor • Luminance processor • Video clock/timing processor and power-down control • I2C interface • VBI data processor 2 Introduction Submit Documentation Feedback www.ti.com TVP5154 4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK SLES163A – MARCH 2006 – REVISED JULY 2006 1.3.1 Related Products • • • • • • TVP5150 TVP5150AM1 TVP5145 TVP5146 TVP5147 TVP5160 1.3.2 Ordering Information abc TA 0°C to 70°C PACKAGED DEVICES 128-PIN TQFP-PowerPAD™ TVP5154PNP TVP5154PNPR PACKAGE OPTION Tray Tape and reel Submit Documentation Feedback Introduction 3 TVP5154 4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK SLES163A – MARCH 2006 – REVISED JULY 2006 www.ti.com 2 Functional Block Diagram OUTPUT FORMATTER OUTPUT FORMATTER OUTPUT FORMATTER OUTPUT FORMATTER VBI SLICER Y/C SEPARATION AIP1A AIP1B M U X AGC 9−Bit A/D LUMINANCE PROCESSING CHROMINANCE PROCESSING SCALER CH1_OUT [7:0] YCBCR 8−Bit 4:2:2 VBI SLICER Y/C SEPARATION AIP2A AIP2B M U X 9−Bit A/D AGC LUMINANCE PROCESSING CHROMINANCE PROCESSING SCALER CH2_OUT [7:0] YCBCR 8−Bit 4:2:2 VBI SLICER Y/C SEPARATION AIP3A AIP3B M U X AGC 9−Bit A/D LUMINANCE PROCESSING CHROMINANCE PROCESSING SCALER CH3_OUT [7:0] YCBCR 8−Bit 4:2:2 VBI SLICER Y/C SEPARATION AIP4A AIP4B M U X AGC 9−Bit A/D LUMINANCE PROCESSING CHROMINANCE PROCESSING SCALER CH4_OUT [7:0] YCBCR 8−Bit 4:2:2 SCL SDA I2C INTERFACE SYNC PROCESSOR HOST PROCESSOR FID/GLCO[1−4] VSYNC/PAL[1−4] INTERQ/GPCL/BLK[1−4] HSYNC[1−4] AVID[1−4] CLK[1−4] SCLK[1−4] XIN/OSC XOUT PLL Figure 2-1. Functional Block Diagram 4 Functional Block Diagram Submit Documentation Feedback www.ti.com TVP5154 4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK SLES163A – MARCH 2006 – REVISED JULY 2006 3 Terminal Assignments 3.1 Pinout AGND AVDD REFP1 REFM1 XIN/OSC XOUT PDN RESETB SCL SDA I2CA0 I2CA1 DGND DVDD IOVDD IOGND CH1_OUT0 CH1_OUT1 CH1_OUT2 CH1_OUT3 CH1_OUT4 CH1_OUT5 CH1_OUT6 CH1_OUT7 SCLK1 CLK1 INT1/GPCL1/VBLK1 AVID1 HSYNC1 DGND DVDD IOVDD 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 AI1GND AIP1A AIP1B PLL_VDD PLL_GND REFM2 REFP2 AVDD AGND AI2GND AIP2A AIP2B PLL_VDD PLL_GND AVDD AGND REFM3 REFP3 AVDD AGND AI3GND AIP3A AIP3B PLL_VDD PLL_GND REFM4 REFP4 AVDD AGND AI4GND AIP4A AIP4B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TVP5154 128− TQFP Package Pin (Top View) IOGND VSYNC1/PALI1 FID1/GLCO1 CH2_OUT0 CH2_OUT1 CH2_OUT2 CH2_OUT3 CH2_OUT4 CH2_OUT5 CH2_OUT6 CH2_OUT7 SCLK2 CLK2 INT2/GPCL2/VBLK2 DGND DVDD IOVDD IOGND AVID2 HSYNC2 VSYNC2/PALI2 FID2/GLCO2 CH3_OUT0 CH3_OUT1 CH3_OUT2 CH3_OUT3 CH3_OUT4 CH3_OUT5 CH3_OUT6 CH3_OUT7 DGND DVDD Submit Documentation Feedback PLL_VDD PLL_GND AGND TMS FID4/GLCO4 VSYNC4/PALI4 HSYNC4 AVID4 INT4/GPCL4/VBLK4 CLK4 SCLK4 IOGND IOVDD DVDD DGND CH4_OUT7 CH4_OUT6 CH4_OUT5 CH4_OUT4 CH4_OUT3 CH4_OUT2 CH4_OUT1 CH4_OUT0 FID3/GLCO3 VSYNC3/PALI3 HSYNC3 AVID3 INT3/GPCL3/VBLK3 CLK3 SCLK3 IOGND IOVDD Terminal Assignments 33 34 35 36 37 38 39 40 41 42 43 44 45