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Texas Instruments
Texas Instruments

TPS65053 Datasheet

5-CHANNEL POWER MGMT IC


TPS65053 Datasheet Preview


www.ti.com
TPS65053
SLVS754 – MARCH 2007
5-CHANNEL POWER MGMT IC WITH TWO STEP DOWN CONVERTERS
AND 3 LOW-INPUT VOLTAGE LDOs
FEATURES
Up To 95% Efficiency
Output Current for DC/DC Converters:
– DCDC1 = 1 A; DCDC2 = 0.6 A
DC/DC Converters Externally Adjustable
VIN Range for DC/DC Converters From 2.5 V to
6V
2.25-MHz Fixed Frequency Operation
Power Save Mode at Light Load Current
180° Out-of-Phase Operation
Output Voltage Accuracy in PWM mode ±1%
Total Typical 32-µA Quiescent Current for
Both DC/DC Converters
100% Duty Cycle for Lowest Dropout
One General-Purpose 400-mA LDO
Two General-Purpose 200-mA LDOs
VIN Range for LDOs from 1.5 V to 6.5 V
Available in a 4 mm x 4 mm 24-Pin QFN
Package
APPLICATIONS
Cell Phones, Smart-Phones
WLAN
PDAs, Pocket PCs, GPS
OMAP™ and Low-Power DSP Supply
Portable Media Players
Digital Cameras
DESCRIPTION
The TPS65053 is an integrated Power Management
IC for applications powered by one Li-Ion or
Li-Polymer cell, which require multiple power rails.
The TPS65053 provides two highly efficient,
2.25MHz step-down converters targeted at providing
the core voltage and I/O voltage in a processor
based system. Both step-down converters enter a
low power mode at light load for maximum efficiency
across the widest possible range of load currents.
For low noise applications the devices can be forced
into fixed frequency PWM mode by pulling the
MODE pin high. Both converters allow the use of
small inductors and capacitors to achieve a small
solution size. TPS65053 provides an output current
of up to 1A on the DCDC1 converter and up to 0.6A
on the DCDC2 converter. The TPS65053 also
integrates one 400mA LDO and two 200mA LDO
voltage regulators, which can be turned on/off using
separate enable pins on each LDO. Each LDO
operates with an input voltage range between 1.5V
and 6.5V allowing them to be supplied from one of
the step-down converters or directly from the main
battery. LDO1 and LDO2 are externally adjustable
while LDO3 has a fixed output voltage of 1.3V.
The TPS65053 comes in a small 24-pin leadless
package (4mm × 4mm QFN) with a 0.5mm pitch.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OMAP, PowerPAD are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
Page 1

TPS65053
SLVS754 – MARCH 2007
ORDERING INFORMATION(1)
www.ti.com
TA
–40°C to 85°C
PART
NUMBER
TPS65053
QFN (2)
PACKAGE
RGE
PACKAGE MARKING
65053
(1) For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI web site at www.ti.com.
(2) The RGE package is available in tape and reel. Add R suffix (TPS65053RGER) to order quantities of
3000 parts per reel. Add T suffix (TPS65053RGET) to order quantities of 250 parts per reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
Input voltage range on all pins except AGND, PGND, and EN_LDO1 pins with respect to
VI AGND
Input voltage range on EN_LDO1 pin with respect to AGND
Current at VINDCDC1/2, L1, PGND1, L2, PGND2
II Current at all other pins
Continuous total power dissipation
TA Operating free-air temperature
TJ Maximum junction temperature
Tstg Storage temperature range
Lead temperature 1,6mm (1/16-inch) from case for 10 seconds
UNITS
-0.3 V to 7 V
–0.3 V to VCC + 0.5 V
1800 mA
1000 mA
See Dissipation Rating Table
–40°C to 85°C
125°C
–65°C to 150°C
260°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS
PACKAGE
RGE
RθJA (1)
35 K/W
TA 25°C
POWER RATING
2.8 W
DERATING FACTOR
ABOVE TA = 25°C
28 mW/K
TA = 70°C
POWER RATING
1.57 W
(1) The thermal resistance junction to case of the RGE package is 2 K/W measured on a high K board.
TA = 85°C
POWER RATING
1.14 W
RECOMMENDED OPERATING CONDITIONS
VINDCDC1/2
VDCDC1
VDCDC2
VINLDO1,
VINLDO2/3
VLDO1-2
VLDO3
IOUTDCDC1
L1
CINDCDC1/2
COUTDCDC1
IOUTDCDC2
L2
COUTDCDC2
CVCC
Input voltage range for step-down converters
Output voltage range for VDCDC1 step-down converter
Output voltage range for VDCDC2 step-down converter
Input voltage range for LDOs
Output voltage range for LDO1 and LDO2
Output voltage for LDO3
Output current at L1
Inductor at L1(1)
Input capacitor at VINDCDC1/2(1)
Output capacitor at VDCDC1(1)
Output current at L2
Inductor at L2 (1)
Output capacitor at VDCDC2 (1)
Input capacitor at VCC (1)
MIN NOM
2.5
0.6
0.6
1.5
MAX
6
VINDCDC1
VINDCDC2
6.5
UNIT
V
V
V
V
1.0
VINLDO1,
VINLDO2
V
1.3 V
1000 mA
1.5 2.2
µH
22 µF
10 22
µF
600 mA
1.5 2.2
µH
10 22
µF
1 µF
(1) See the Application Information section of this data sheet for more details.
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TPS65053
SLVS754 – MARCH 2007
RECOMMENDED OPERATING CONDITIONS (continued)
Cin1-2
COUT1
COUT2-3
ILDO1
ILDO2,3
TA
TJ
RCC
Input capacitor at VINLDO1, VINLDO2/3 (1)
Output capacitor at VLDO1 (1)
Output capacitor at VLDO2-3 (1)
Output current at VLDO1
Output current at VLDO2,3
Operating ambient temperature range
Operating junction temperature range
Resistor from battery voltage to VCC used for filtering(2)
MIN NOM
2.2
4.7
2.2
–40
–40
1
MAX
400
200
85
125
10
UNIT
µF
µF
µF
mA
mA
°C
°C
(2) Up to 2 mA can flow into VCC when both converters are running in PWM, this resistor causes the UVLO threshold to be shifted
accordingly.
ELECTRICAL CHARACTERISTICS
Vcc = VINDCDC1/2 = 3.6V, EN = Vcc, MODE = GND, L = 2.2µH, COUT = 22µF, TA = –40°C to 85°C typical values
are at TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
SUPPLY CURRENT
Vcc Input voltage range
One converter, IOUT = 0 mA.PFM mode enabled (Mode =
GND) device not switching,
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1= EN_LDO2 = EN_LDO3 = GND
2.5
20
6.0
30
IQ
Operating quiescent current
Total current into VCC, VINDCDC1/2,
VINLDO1, VINLDO2/3
Two converters, IOUT = 0 mA, PFM mode enabled (Mode =
0) device not switching,
EN_DCDC1 = Vin AND EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
32 40
One converter, IOUT = 0 mA, PFM mode enabled (Mode =
GND) device not switching,
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = Vin
145 210
One converter, IOUT = 0 mA, Switching with no load (Mode
= Vin), PWM operation
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
IQ Operating quiescent current into VCC Two converters, IOUT = 0 mA, Switching with no load (Mode
= Vin), PWM operation
EN_DCDC1 = Vin AND EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
0.85
1.25
I(SD) Shutdown current
EN_DCDC1 = EN_DCDC2 = GND
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
9 12
V(UVLO)
Undervoltage lockout threshold for
DCDC converters and LDOs
Voltage at VCC
1.8 2.0
EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2, EN_LDO3, MODE
VIH High-level input voltage
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
EN_LDO3
1.2
VCC
VIL Low-level input voltage
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
EN_LDO3
0
0.4
IIN Input bias current
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
EN_LDO3, MODE = GND or VIN
0.01
1.0
POWER SWITCH
rDS(on)
P-channel MOSFET on DCDC1,
resistance
DCDC2
VINDCDC1/2 = 3.6 V
VINDCDC1/2 = 2.5 V
280 630
400
ILD_PMOS
rDS(on)
P-channel leakage current
N-channel MOSFET on DCDC1,
resistance
DCDC2
V(DS) = 6 V
VINDCDC1/2 = 3.6 V
VINDCDC1/2 = 2.5 V
1
220 450
320
ILK_NMOS
I(LIMF)
N-channel leakage current
Forward Current Limit
PMOS (High-Side) and
NMOS (Low side)
DCDC1
DCDC2
V(DS) = 6.0 V
2.5 V VIN 6.0 V
1.19
0.85
7
1.4
1.0
10
1.65
1.15
UNIT
V
µA
µA
µA
mA
mA
µA
V
V
V
µA
m
µA
m
µA
A
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Page 3

TPS65053
SLVS754 – MARCH 2007
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Vcc = VINDCDC1/2 = 3.6V, EN = Vcc, MODE = GND, L = 2.2µH, COUT = 22µF, TA = –40°C to 85°C typical values
are at TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
TSD Thermal shutdown
Thermal shutdown hysteresis
Increasing junction temperature
Decreasing junction temperature
150
20
OSCILLATOR
fSW Oscillator frequency
OUTPUT
2.025
2.25
2.475
VOUT
Vref
VOUT
VOUT
Output voltage range
Reference voltage
DC output voltage
accuracy
DCDC1,
DCDC2 (1)
Power save mode ripple voltage(2)
VIN = 2.5 V to 6.0 V, Mode = GND,
PFM operation, 0 mA < IOUT < IOUTMAX
VIN = 2.5 V to 6.0 V, Mode = VIN,
PWM operation, 0 mA < IOUT < IOUTMAX
IOUT = 1 mA, Mode = GND, VO = 1.3 V,
Bandwidth = 20 MHz
0.6
-2%
–1%
600
0
0
25
VIN
2%
1%
tStart
tRamp
Start-up time
VOUT Ramp up Time
RESET delay time
Time from active EN to Start switching
Time to ramp from 5% to 95% of VOUT
Input voltage at threshold pin rising
170
750
80 100
120
VOL RESET output low voltage
RESET sink current
IOL = 1 mA, Vthreshold < 1 V
0.2
1
RESET output leakage current
Vthreshold > 1 V
10
Vth Threshold voltage
falling voltage
VLDO1, VLDO2, VLDO3 LOW DROPOUT REGULATORS
0.98
1 1.02
VINLDO
Input voltage range for LDO1, LDO2,
LDO3
1.5 6.5
VLDO1
VLDO2
LDO1 output voltage range
LDO2 output voltage range
1.0 VinLDO1
1.0
VinLDO2/
3
VLDO3
V(FB)
LDO3 output voltage
Feedback voltage for FB_LDO1,
FB_LDO2
1.3
1
Maximum output current for LDO1
IO Maximum output current for LDO2,
LDO3
400
200
LDO1 short-circuit current limit
VLDO1 = GND
I(SC)
LDO2 & LDO3 short-circuit current
limit
VLDO2 = GND, VLDO3 = GND
850
420
Dropout voltage at LDO1
Dropout voltage at LDO2, LDO3
Output voltage accuracy for LDO1,
LDO2, LDO3(1)
IO = 400 mA, VINLDO1 = 1.8 V
IO = 200 mA, VINLDO2/3 = 1.8 V
IO = 10 mA
–2%
280
280
1%
Line regulation for LDO1, LDO2,
LDO3
VINLDO1,2 = VLDO1,2 + 0.5 V (min. 2.5 V) to 6.5V, IO = 10 mA
–1%
1%
Load regulation for LDO1, LDO2,
LDO3
Regulation time for LDO1, LDO2,
LDO3
IO = 0 mA to 400 mA for LDO1
IO = 0 mA to 200 mA for LDO2, LDO3
Load change from 10% to 90%
–1%
25
1%
R(DIS)
Internal discharge resistor at VLDO1,
VLDO2, VLDO3
Active when LDO is disabled
350
Thermal shutdown
Increasing junction temperature
140
Thermal shutdown hysteresis
Decreasing junction temperature
20
UNIT
°C
°C
MHz
V
mV
mVPP
µs
µs
ms
V
mA
nA
V
V
V
V
V
V
mA
mA
mA
mA
mV
mV
µs
°C
°C
(1) Output voltage specification does not include tolerance of external voltage programming resistors.
(2) In Power Save Mode, operation is typically entered at IPSM = VIN / 32 .
4 Submit Documentation Feedback
Page 4
Part Number TPS65053
Manufactur Texas Instruments
Description 5-CHANNEL POWER MGMT IC
Total Page 29 Pages
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