(TPS3617 / TPS3618) BATTERY-BACKUP SUPERVISOR

TPS3617 TPS3618 www.ti.com SLVS339C – DECEMBER 2000 – REVISED NOVEMBER 2004 BATTERY-BACKUP SUPERVISOR FOR RAM RETENTION FEATURES • • • • • • • • • • • • • • • • • • • Supply Current of 40 µA (Max) Battery Supply Current of 100 nA (Max) Precision 5-V Supply Voltage Monitor, Other Voltage Options on Request Backup-Battery Voltage Can Exceed VDD Watchdog Timer With 800-ms Time-Out Power-On Reset Generator With Fixed 100-ms Reset Delay Time Voltage Monitor for Power-Fail or Low-Battery Monitoring Battery Freshness Seal (TPS3617 Only) 8-Pin MSOP Package Temperature Range: -40°C to 85°C DESCRIPTION The TPS3617 and TPS3618 are battery-backup supervisors that monitor 5 V supplies. They provide a battery-backup function ideal for applications that require data retention of CMOS RAM during fault conditions. When the voltage at VDD drops below a preset threshold (VIT), the active low push-pull RESET output asserts, and VOUT switches from VDD to VBAT. When VDD rises above the trip threshold, VOUT switches immediately from VBAT to VDD. The RESET output remains low until the delay time (td) expires. During power on, RESET is asserted when the supply voltage (VDD or VBAT) goes higher than 1.1 V. The PFI and PFO pins are provided if additional voltage monitoring is needed. If the voltage at PFI is less than 1.15 V, the push-pull PFO pin will assert low. When the voltage at PFI exceeds the threshold voltage, PFO will go high. APPLICATIONS Fax Machines Set-Top Boxes Advanced Voice Mail Systems Portable Battery Powered Equipment Computer Equipment Advanced Modems Automotive Systems Portable Long-Time Monitoring Equipment Point-of-Sale Equipment MSOP (DGK) Package (TOP VIEW) VOUT VDD GND PFI VBAT RESET WDI PFO These devices also feature a watchdog timer pin (WDI) that monitors processor activity and asserts RESET if the the processor is inactive longer than the www.DataSheet4U.com watchdog timeout period. If the watchdog timer is not used, the WDI pin should be left floating. The TPS3617 and TPS3618 are available in an 8-pin MSOP package and are characterized for operation over a temperature range of -40°C to 85°C. Power Supply 0.1 µF TPS3617 TPS3618 VDD VBAT RESET Rx PFI WDI PFO Backup Battery Microcontroller or Microprocessor External Source RESET I/O I/O Switchover Capacitor ACTUAL SIZE 3,05 mm x 4,98 mm Ry VOUT GND 0.1 µF VCC GND Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2004, Texas Instruments Incorporated TPS3617 TPS3618 SLVS339C – DECEMBER 2000 – REVISED NOVEMBER 2004 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE INFORMATION (1) NOMINAL SUPPLY VOLTAGE THRESHOLD VOLTAGE (VIT) (2) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ASD 5V TPS3618-50 (1) (2) 4.55V -40°C to +125°C ANK ORDERING NUMBER TPS3617-50DGK TPS3617-50DGKR TPS3618-50DGKT TPS3618-50DGKR TRANSPORT MEDIA, QUANTITY Tube, 80 Tape and Reel, 2500 Tape and Reel, 250 Tape and Reel, 2500 PRODUCT TPS3617-50 For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or refer to our web site at www.ti.com. For other threshold votages, contact the local TI sales office for availability and lead time. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature (unless otherwise noted) (1) TPS3617, TPS3618 Input voltage range, VDD Input voltage range, PFI pin Continuous output current at VOUT, IO All other pins, IO Operating junction temperature range, TJ (2) Storage temperature range, TSTG Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds Continuous total power dissipation (1) (2) -0.3 to 7 -0.3 to (VDD + 0.3) 400 ±10 -40 to +85 -65 to +150 +260 See Dissipation Rating Table UNIT V V mA mA °C °C °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Due to the low dissipated power in this device, it is assumed that TJ = TA. DISSIPATION RATING TABLE PACKAGE DGK TA ≤ 25°C POWER RATING 470 mW DERATING FACTOR ABOVE TA = 25°C 3.76 mW/°C TA = 70°C POWER RATING 301 mW TA = 85°C POWER RATING 241 mW 2 TPS3617 TPS3618 www.ti.com SLVS339C – DECEMBER 2000 – REVISED NOVEMBER 2004 ELECTRICAL CHARACTERISTICS 1.65 V ≤ VDD≤ 5.5 V, RLRESET = 1 MΩ, CLRESET = 50 pF, over operating temperature range (TJ = -40°C to +85°C), unless otherwise noted. Typical values are at TJ = 25°C. PARAMETER VDD IDD VBAT IBAT Input supply range VDD supply current Battery supply range VBAT supply current Slew rate at VDD or VBAT VI Input volrage, any input VDD = 1.8 V, IOH = -400 µA RESET VOH High-level output voltage PFO VDD = 3.3 V, IOH = -2 mA, VDD = 5 V, IOH = -3 mA VDD = 1.8 V, IOH = -20 µA VDD = 3.3 V, IOH = -80 µA, VDD = 5 V, IOH = -120 µA VDD = 1.8 V, IOL = 400 µA VOL Low-level output voltage RESET PFO VDD = 3.3 V, IOL = 2 mA, VDD = 5 V, IOL = 3 mA VBAT > 1.1 V, or VDD > 1.1 V, IOL = 20 µA IO = 8.5 mA,VDD = 1.8 V, VBAT = 0 V Normal mode VOUT Battery-backup mode RDS(on) IO VIT VPFI VDD to VOUT on-resistance VBAT to VOUT on-resistance Continuous output current at VOUT Negative-going input threshold voltage (2) TPS3617-50 PFI TA = -40°C to 85°C 1.65 V < VIT < 2.5 V VIT hysteresis VHYS PFI hysteresis VBSW hysteresis VIH VIL IIH IIL II IOS (3) TEST CONDITIONS VOUT = VDD VOUT = VBAT MIN 1.65 TYP MAX 5.5 40 40 UNIT V µA V µA V/µs V 1.5 VOUT = VDD VOUT = VBAT 0 VDD - 0.2 VDD - 0.4 VDD - 0.3 VDD - 0.4 -0.1 5.5 0.1 0.5 1 VDD + 0.3 V 0.2 0.4 0.4 VDD - 0.050 VDD - 0.150 VDD - 0.200 VBAT - 0.200 VBAT - 0.113 0.6 8 4.46 1.13 4.55 1.15 20 40 60 12 55 0.7 x VDD 0.3 x VDD mV 1.17 1 15 300 Ω mA V V V V VRES Power-up reset voltage (1) V IO = 125 mA,VDD = 3.3 V, VBAT = 0 V IO = 200 mA,VDD = 5 V, VBAT = 0 V IO = 0.5 mA,VBAT = 1.5 V, VDD = 0 V IO = 7.5 mA,VBAT = 3.3 V, VDD = 0 V VDD = 5 V VBAT = 3.3 V 2.5 V < VIT < 3.5 V 3.5 V < VIT < 5.5 V VDD = 1.8 V WDI high-level input voltage WDI low-level input voltage WDI high-level input current WDI low-level input current PFI input current PFO short-circuit current (4) WDI = VDD = 5 V WDI = 0 V, VDD = 5 V PFI voltage < VDD PFO = 0 V, VDD = 1.8 V PFO = 0 V, VDD = 3.3 V PFO = 0 V, VDD = 5 V -25 150 -150 100 25 -0.3 -1.1 -2.4 µA µA ns/V nA mA (4) WDI input transition rise and fall rate, ∆t/∆V (1) (2) (3) (4) The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 µs/V. To ensure the best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near the supply terminals. For VDD < 1.6 V, VOUT switches to VBAT regardless of VBAT. For details on how to optimize current consumption when using WDI, refer to the Watchdog section of this data sheet. 3 TPS3617 TPS3618 SLVS339C – DECEMBER 2000 – REVISED NOVEMBER 2004 www.ti.com ELECTRICAL CHARACTERISTICS (continued) 1.65 V ≤ VDD≤ 5.5 V, RLRESET = 1 MΩ, CLRESET = 50 pF, over operating temperature range (TJ = -40°C to +85°C), unless otherwise noted. Typical values are at TJ = 25°C. PARAMETER Ci tw td t(tout) Input capacitance, any input VDD Pulse Width WDI TEST CONDITIONS VI = 0 V to 5 V VIH = VIT + 0.2 V, VIL = VIT - 0.2 V VDD > VIT + 0.2 V, VIL = 0.3 x VDD, VIH = 0.7 x VDD VDD ≥ VIT + 0.2 V, See timing diagram VDD > VIT + 0.2 V, See timing diagram VDD to RESET PFI to PFO VDD to VBAT VIL = VIT - 0.2 V, VIH = VIT + 0.2 V VIL = VPFI - 0.2 V, VIH = VPFI + 0.2 V 6 100 60 0.48 100 0.8 2 3 140 1.12 5 µs 5 3 µs MIN TYP 5 MAX UNIT pF µs ns ms s Delay time Watchdog time-out tPHL Propagation (delay) time, high-to-low-level output Transition time TIMING DIAGRAM VBAT VIT VDD VOUT t t RESET td td t FUNCTION TABLE VDD > VIT 0 0 1 1 VDD > VBAT 0 1 0 1 VOUT VBAT VDD VDD VDD RESET 0 0 1 1 4 TPS3617 TPS3618 www.ti.com SLVS339C – DECEMBER 2000 – REVISED NOVEMBER 2004 PFO FUNCTION TABLE PFI > VPFI 0 1 PFO 0 1 CONDITION: VDD > VDD(MIN) TERMINAL FUNCTIONS TERMINAL NAME GND PFI PFO RESET VBAT VDD VOUT WDI NO. 3 4 5 7 8 2 1 6 I/O I I O O I I O I DESCRIPTION Ground Power-fail comparator input Power-fail comparator output; asserts low when PFI < 1.15 V Active-low push-pull reset output Backup-battery input Input supply voltage Supply output Watchdog input. Should be left floating if not used. FUNCTIONAL BLOCK DIAGRAM TPS3617 TPS3618 VBAT + _ VDD Reference Voltage or 1.15 V + _ GND Oscillator − PFI + Watchdog Logic + Control PFO Switch Control VOUT RESET Logic + Timer RESET WDI Transition Detector 40 kΩ 5 TPS3617 TPS3618 SLVS339C – DECEMBER 2000 – REVISED NOVEMBER 2004 www.ti.com TYPICAL CHARACTERISTICS TABLE OF GRAPHS FIGURE rDS(on) IDD VIT VOH VOL Static drain-source on-state resistance (VDD to VOUT) Static drain-source on-state resistance (VBAT to VOUT) Supply current Input threshold voltage at RESET High-level output voltage at RESET High-level o