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Part Number |
TPS3606-33 |
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Manufacturer |
Texas Instruments |
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Semiconductor DataSheet |
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DataSheet View |
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TPS3606 33 BATTERY BACKUP SUPERVISOR FOR LOW POWER PROCESSORS
SLVS335C − DECEMBER 2000 − REVISED JANUARY 2007
features
typical applications
D Supply Current of 40 µA (Max) D Precision 3.3-V Supply Voltage Monitor D D D D D D D D D
Other Voltage Options on Request Watchdog Timer With 800-ms Time-Out Backup-Battery Voltage Can Exceed VDD Power-On Reset Generator With Fixed 100-ms Reset Delay Time Voltage Monitor for Power-Fail or Low-Battery Monitoring Manual Switchover to Battery-Backup Mode Manual Reset Battery Freshness Seal 10-Pin MSOP Package Temperature Range . . . −40°C to 85°C
D D D D D D D D D
Fax Machines Set-Top Boxes Advanced Voice Mail Systems Portable Battery Powered Equipment Computer Equipment Advanced Modems Automotive Systems Portable Long-Time Monitoring Equipment Point-of-Sale Equipment
MSOP (DGS) Package (TOP VIEW)
VOUT VDD GND MSWITCH PFI VBAT RESET WDI MR PFO
description
The TPS3606-33 supervisory circuit monitors and controls the processor activity. In case of powerfail or brownout conditions, the backup-battery switchover function of the TPS3606-33 allows a low-power processor and its peripherals to run www.DataSheet4U.com from the installed backup battery without asserting a reset beforehand.
ACTUAL SIZE 3,05 mm x 4,98 mm
typical operating circuit
Power Supply 0.1 µF External Source Rx Backup Battery uC RESET I/O I/O
VDD VBAT TPS3606 PFI RESET WDI PFO MR
Ry
Manual Reset
MSWITCH V OUT GND
Switchover Capacitor 0.1 µF VCC GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2000−2007, Texas Instruments Incorporated
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TPS3606 33 BATTERY BACKUP SUPERVISOR FOR LOW POWER PROCESSORS
SLVS335C − DECEMBER 2000 − REVISED JANUARY 2007
description (continued)
During power on, RESET is asserted when the supply voltage (VDD or VBAT) becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors VOUT and keeps the RESET output active as long as VOUT remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VOUT has risen above VIT. When the supply voltage drops below VIT, the output becomes active (low) again. The TPS3606-33 is available in a 10-pin MSOP package and is characterized for operation over a temperature range of −40_C to 85_C.
PACKAGE INFORMATION TA −40°C to 85°C DEVICE NAME TPS3606−33DGSR† MARKING AKE
† The DGSR passive indicates tape and reel of 2500 parts.
ordering information application specific versions (see Note)
TPS360 6 − 33 DGS R Reel Package Nominal Supply Voltage Functionality Family DEVICE NAME NOMINAL VOLTAGE}, VNOM
TPS3606−33 DGS 3.3 V ‡ For other threshold voltages, contact the local TI sales office for availability and lead-time. FUNCTION TABLES TPS3606 VDD > VSW 0 0 0 0 1 1 VOUT > VIT 0 0 1 1 1 1 VDD > VBAT 0 1 0 1 0 1 VOUT VBAT VDD VBAT VDD VDD VDD PFO 0 1 RESET 0 0 1 1 1 1
PFI > VPFI 0 1
CONDITION.: VOUT > VDD(min)
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TPS3606 33 BATTERY BACKUP SUPERVISOR FOR LOW POWER PROCESSORS
SLVS335C − DECEMBER 2000 − REVISED JANUARY 2007
functional schematic
TPS3606 MR MSWITCH VBAT + _ VDD Reference Voltage or 1.15 V R1 _ R2 + RESET Logic and Timer _ PFO PFI Oscillator + Switch Control VOUT
RESET
WDI
Transition Detector 40 kΩ
Watchdog Logic and Control
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TPS3606 33 BATTERY BACKUP SUPERVISOR FOR LOW POWER PROCESSORS
SLVS335C − DECEMBER 2000 − REVISED JANUARY 2007
timing diagram
V(BOK) V(SWP) V(SWN) V(IT) VBAT
VDD
VOUT
t
V(SWN)
t RESET
VBAT
VDD
VBAT
VDD
VBAT
t
NOTES: A. MSWITCH = 0, MR = 1
Terminal Functions
TERMINAL NAME GND MR MSWITCH PFI PFO RESET VBAT VDD VOUT WDI NO. 3 7 4 5 6 9 10 2 1 8 I/O I I I I O O I I O I Ground Manual reset input Manual switch to force device into battery-backup mode Power-fail comparator input Power-fail comparator output Active-low reset output Backup-battery input Input supply voltage Supply output Watchdog timer input DESCRIPTION
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TPS3606 33 BATTERY BACKUP SUPERVISOR FOR LOW POWER PROCESSORS
SLVS335C − DECEMBER 2000 − REVISED JANUARY 2007
detailed description
battery freshness seal The battery freshness seal of the TPS3606 family disconnects the backup battery from the internal circuitry until it is needed. This ensures that the backup battery connected to VBAT is fresh when the final product is put to use. The following steps explain how to enable the freshness seal mode: 1. Connect VBAT (VBAT > VBAT(min)) 2. Ground PFO 3. Connect PFI to VDD or PFI > V(PFI) 4. Connect VDD to power supply (VDD > VIT) 5. Ground MR 6. Power down VDD 7. The freshness seal mode is entered and pins PFO and MR can be disconnected. The battery freshness seal mode is disabled by the positive-going edge of RESET when VDD is applied. power-fail comparator (PFI and PFO) An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail input (PFI) is compared with an internal voltage reference of 1.15 V. If the input voltage falls below the power-fail threshold (V(PFI)) of 1.15 V typical, the power-fail output (PFO) goes low. If it goes above V(PFI) plus about 12-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to supervise any voltages above V(PFI). The sum of both resistors should be about 1 MΩ, to minimize power consumption and also to ensure that the current in the PFI pin can be neglected compared with the current through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure minimal variation of sensed voltage. If the power-fail comparator is unused, connect PFI to ground and leave PFO unconnected. backup-battery switchover In the event of a brownout or power failure, it may be necessary to keep a processor running. If a backup battery is installed at VBAT, the devices automatically connect the processor to backup power when VDD fails. In order to allow the backup battery (e.g., a 3.6-V lithium cell) to have a higher voltage than VDD, this family of supervisors does not connect VBAT to VOUT when VBAT is greater than VDD. VBAT only connects to VOUT (through a 2-Ω switch) when VOUT falls below V(SWN) and VBAT is greater than VDD. When VDD recovers, switchover is deferred either until VDD crosses VBAT, or when VDD rises above the threshold (V(SWP).
VDD > VBAT 1 1 0 0 VDD > V(SWN) 1 0 1 0 VOUT VDD VDD VDD VBAT
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TPS3606 33 BATTERY BACKUP SUPERVISOR FOR LOW POWER PROCESSORS
SLVS335C − DECEMBER 2000 − REVISED JANUARY 2007
detailed description (continued)
manual switchover (MSWITCH) While operating in the normal mode from VDD, the device can be manually forced to operate in the battery-backup mode by connecting MSWITCH to VDD. The table below shows the different switchover modes.
MSWITCH GND VDD mode Battery-backup mode VDD GND VDD Status VDD mode Switch to battery-backup mode Battery-backup mode Battery-backup mode
If the manual switchover feature is not used, MSWITCH must be connected to ground. watchdog In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also important to ensure the correct program execution. The task of a watchdog is to ensure that the program is not stalled in an indefinite loop. The microprocessor, microcontroller, or the DSP has to toggle the watchdog input within typically 0.8 s to avoid a time-out from occurring. Either a low-to-high or a high-to-low transition resets the internal watchdog timer. If the input is unconnected, the watchdog is disabled and is retriggered internally. saving current while using the watchdog The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then momentarily pulses high, resetting the watchdog counter. For minimum watchdog input current (minimum overall power consumption), leave WDI low for the majority of the watchdog time-out period, pulsing it low-high-low once within 7/8 of the watchdog time-out period to reset the watchdog timer. If instead, WDI is externally driven high for the majority of the time-out period, a current of e.g. 5 V/40 kΩ ≈ 125 µA can flow into WDI.
VOUT VIT
WDI
t(tout)
RESET
td
td
td
Undefined
Figure 1. Watchdog Timing
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TPS3606 33 BATTERY BACKUP SUPERVISOR FOR LOW POWER PROCESSORS
SLVS335C − DECEMBER 2000 − REVISED JANUARY 2007
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage: VDD (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V MR, WDI, and PFI pins (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (VDD + 0.3 V) Continuous output current at VOUT: IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA All other pins, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150 |