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Part Number |
TMP90C441 |
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Manufacturer |
Toshiba |
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Semiconductor DataSheet |
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DataSheet View |
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TOSHIBA
TLCS-90 Series
TMP90C441
CMOS 8–Bit Microcontrollers TMP90C441N/TMP90C441F
1. Outline and Characteristics The TMP90C441 is a high-speed advanced 8-bit microcontroller applicable to a variety of equipment. With its 8-bit CPU, A/D converter, multi-function timer/ event counter and general-purpose serial interface integrated into a single CMOS chip, the TMP90C441 allows the expansion of external memories for programs (up to 64K byte) and data (1M byte). The TMP90C441N is a 64-pin shrink DIP product. (SDIP64-P750) The TMP90C441F is a 64-pin flat package product. (QFP64-P1420A) The characteristics of the TMP90C441 include: (1) Powerful instructions: 163 basic instructions, including Multiplication, division, 16-bit arithmetic operations, bit manipulation instructions
(2) (3) (4)
(5) (6) (7) (8) (9) (10) (11) (12) (13) (14)
Minimum instruction executing time: 250ns at 16MHz oscillation frequency) Internal RAM Memory expansion External program memory: 64K byte External data memory: 1M byte 8-bit A/D converter (6 channels) General-purpose serial interface (1 Channel) Asynchronous mode, I/O interface mode Multi-function 16-bit timer/event counter (1 channel) 8-bit timers (4 channels) Stepping motor control port (2 channels) Input/Output ports (28 pins) Interrupt function: 10 internal interrupts and 4 external interrupts Micro Direct Memory Access (µDMA) function (11 channels) Watchdog timer Standby function (4 HALT modes)
The information contained here is subject to change without notice. The information contained herein is presented only as guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. These TOSHIBA products are intended for usage in general electronic equipments (office equipment, communication equipment, measuring equipment, domestic electrification, etc.) Please make sure that you consult with us before you use these TOSHIBA products in equipments which require high quality and/or reliability, and in equipments which could have major impact to the welfare of human life (atomic energy control, spaceship, traffic signal, combustion control, all types of safety devices, etc.). TOSHIBA cannot accept liability to any damage which may occur in case these TOSHIBA products were used in the mentioned equipments without prior consultation with TOSHIBA.
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TMP90C441
Figure 1. TMP90C441 Block Diagram
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TMP90C441
2. Pin Assignment and Functions
The assignment of input/output pins, their names and functions are described below.
2.1 Pin Assignment Figure 2.1 (1) shows pin assignment of the TMP90C441N.
Figure 2.1 (1). Pin Assignment (Shrink Dual Inline Package)
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Figure 2.1 (2) shows pin assignment of theTMP90C441F.
Figure 1. 1 (2). Pin Assignment (Flat Package)
2.2 Pin Names and Functions The names of input/output pins and their functions are summarized in Table 2.2. Table 2.2 Pin Names and Functions (1/2)
Pin Name
D0 ~ D7 A0 ~ A7 A8 ~ A15 P30 /RxD P31 /RxD P32 /TxD /RTS /SCLK P33 /TxD P34 /CTS RD WR
No. of pins
8 8 8 1
I/O 3 states
3 states Output Output Input
Function
Data bus: Also functions as 8-bit bidirectional data bus for external memory Address bus: The lower 8 bits address bus for external memory Address bus: The upper 8 bits address bus for external memory Port 30: 1-bit input port Receiver Serial Data Port 31: 1-bit input port Receiver Serial Data Port 32: 1-bit input port
1
Input
1
Output
Transmitter Serial Data Request to send Serial Data Serial clock output
1
Output
Port 33: 1-bit output port Transmitter Serial Data Port 34: 1-bit input port Clear to send Serial data Read: Generates strobe signal for reading external memory Write: Generates strobe signal for writing into external memory
1 1 1
Input Output Output
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Table 2.2 Pin Names and Functions (2/2)
Pin Name
P37 /WAIT P40 ~ P43 /A16 ~ A19 P50 ~ P55 /AN0 ~ AN5 VREF AGND P60 ~ P63 /M00 ~ M03 /TO1 P70 ~ P73 /M10 ~ M13 /TO3
No. of Pins
1
I/O 3 states
Input Port 37: 1-bit input port
Function
Wait: Input pin for connecting slow speed memory or peripheral LSI Port 4: 4-bit output port that allows selection of Port/Address Bus on bit basis
4
Output
Address bus: Also functions as address bus for external memory (4 bits of bank address) Port 5: 6-bit input port Analog input: 6 analog input to A/D converter Input of reference voltage to A/D converter Ground pin for A/D converter Port 6: 4-bit I/O port that allows I/O selection on bit basis Stepping motor control port 0 Timer output 1: Output of Timer 0 or 1 Port 7: 4-bit I/O port that allows I/O selection on bit basis Stepping motor control port 1 Timer output 3: Output of timer 2 or 3 Port 80: 1-bit input port
6 1 1
Input – – I/O
4
Output Output I/O
4
Output Output
P80 /INTO
1
Input
Interrupt request pin 0: Interrupt request pin (Level/rising edge is programmable)
Port 81: 1-bit input port P81 /INT1 /TI4 Interrupt request pin 1: Interrupt request pin (Rising/falling edge is programmable)
1
Input
Timer input 4: Counter/capture trigger signal for Timer 4 P82 /INT2 /TI5 P82 /TO3/T04 NMI CLK EA RESET X1/X2 VCC VSS (GND) Port 82: 1-bit input port 1 Input Interrupt request pin 2: rising edge interrupt request pin Timer input 5: capture trigger signal for Timer 4 1 Output Port 83: 1-bit output port Timer output 3/4: Output of Timer 2, 3 or 4 Non-maskable interrupt request pin: Falling edge interrupt request pin 1 1 1 1 2 1 1 Input Output Input Input Input/ Output – – Clock output: Generates clock pulse at 1/4 frequency of clock oscillation. It is Pulled up internally during resetting. External access: Connects with GND pin in the TMP90C441 with no internal ROM. Reset: Initializes the TMP 90C441. (Built-in pull-up resister) Pin for quartz crystal or ceramic resonator Power supply (+5V) Ground (0V)
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3. Operation
The following explains the TMP90C441 functions and basic operations. The CPU functions and internal I/O functions of the TMP90C441 are the same as the TMP90C840A. Refer to the “TMP90C840A” section concerning functions which are not explained the following. 3.1 CPU The TMP90C441 has an internal high-performance 8-bit CPU. Refer to the “TLCS-90 CPU” section concerning CPU operation. 3.2 Memory Map The TMP90C441 supports a program memory of up to 64K bytes and a data memory of maximum 1M bytes. The program memory may be assigned to the address space from 00000H to 0FFFFH, while the data memory can be allocated to any address from 00000H to FFFFFH.
(1)
Internal RAM The TMP90C441 internally contains a 4K byte RAM, which is allocated to the address space from FBC0H to FFBFH. The CPU allows the access to a certain RAM area (FF00H to FFBFH, 192 bytes) by a short operation code (opcode) in a “direct addressing mode”. The addresses from FF10H to FF7FH in this RAM area can be used as parameter area for micro DMA processing (and for any other purposes when the micro DMA function is not used).
(2)
Internal I/O The TMP90C441 provides a 48-byte address space as an internal I/O area, whose addressess range from FFC0H to FFEFH. This I/O area can be accessed by the CPU using a short opcode in the “direct addressing mode”. Figure 3.1 is a memory map indicating the areas accessible by the CPU in the respective addressing mode.
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Figure 3.2. Memory Map
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4. Electrical Characteristics
TMP90C441N/TMP90C441F 4.1 Absolute Maximum Ratings
Symbol
VCC VIN PD TSOLDER TSTG TOPR Supply voltage Input voltage Power dissipation (Ta = 70°C) Soldering temperature (10s) Storage temperature Operating temperature
Parameter
Rating
-0.5 ~ + 6.5 -0.5 ~ VCC + 0.5 F 500 N 600 260 -65 ~ 150 -20 ~ 70
Unit
V V mW °C °C °C
4.2 DC Characteristics
TA = -20 ~ 70°C Vcc = 5V ± 10% Typical Values are for TA = 25°C and VCC = 5V. Symbol
VIL VIL1 VIL2 VIL4 VIH VIH1 VIH2 VIH4 VOL VOH VOH1 VOH2 IDAR ILI ILO
Parameter
Input Low Voltage (D0 ~ D7) P3, P5, P6, P7, P8 RESET, INT0, NMI X1 Input Low Voltage (D0 ~ D7) P3, P5, P6, P7, P8 RESET, INT0, NMI X1 Output Low Voltage Output High Voltage Darlington Drive Current (8 I/O pins) Input Leakage Current Output Leakage Current Operating Current (RUN) Idle 1 Idle 2 STOP (TA = -20 ~ 70°C) STOP (TA = 0 ~ 50°C)
Min
-0.3 -0.3 -0.3 -0.3 2.2 0.7VCC 0.75VCC 0.8VCC – 2.4 0.75VCC 0.9VCC -1.0 0.02 (Typ) 0.05 (Typ) 19 (Typ) 1.6 (Typ) 9 (Typ) 0.2 (Typ) 50 – 0.4
Max
0.8 0.3VCC 0.25VCC 0.2VCC VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 0.45 –
Unit
V V V V V V V V V V V V mA µA µA mA mA mA µA µA KΩ pF V
Test Conditions
– – – – – – – – IOL = 1.6mA IOH = -400µA IOH = -100µA IOH = -20µA VEXT = 1.5V REXT = 1.1kΩ 0.0 ≤ Vin ≤ VCC 0.2 ≤ Vin ≤ VCC - 0.2 tosc = 16MHz 0.2 ≤ Vin ≤ VCC - 0.2 – testfreq = 1MHz –
-3.5 ±5 ± 10 30 6 15 50 10 150 10 1.0 (Typ)
ICC
RRST CIO VTH
RESET Pull Up Register Pin Capacitance Schmitt width RESET, NMI, INT0
Note: IDAR is guaranteed for a total of up to 8 optional ports.
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4.3 AC Characteristics
TA = -20 ~ 70°CVCC = 5V ± 10% CL = 50pF Variable Symbol
tOSC tCYC tWL tWH tAC tRR tCA tAD tRD tHR tWW tDW tWD tCWA tAWA tWAS tWAH tRV tCPW tPRC tCPR tCHCL tCLC tCLHA tACL tCLD OSC. Period = x CLK Period CLK Low width CLK High width Address Setup to RD, WR RD Low width Address Hold Time After RD, WR Address to Valid Data In RD to Valid Data In Input Data Hold After RD WR Low width Data Setup t |