Multi-Voltage Processor Power Supply

www.DataSheet4U.com TLE 6361 G Multi-Voltage Processor Power Supply Data Sheet 1 1.1 • • • • • • • • Overview Features • • • • • • • • High efficiency regulator system Wide input voltage range, up to 60V Stand-by mode with low current consumption Suitable for standard 12V, 24V and 42V PowerNets Step down converter as pre-regulator: 5.5V / 1.5A Step down slope control for lowest EME Switching loss minimization Three high current linear post-regulators with selectable output voltages: 5V / 800mA 3.3V or 2.6V / 500mA 5V or 3.3V / 350mA Six independent voltage trackers (followers): 5V / 17mA each Stand-by regulator with 1mA current capability Three independent undervoltage detection circuits (e.g. reset, early warning) for each linear post-regulator Power on reset functionality Window watchdog triggered by SPI Tracker control and diagnosis by SPI All outputs protected against short-circuit Power-DSO-36 package Ordering Code Q 67007-A9466 Package P-DSO-36-12 Type TLE 6361 G SMD = Surface Mounted Device P-DSO-36-12 Data Sheet, Rev. 1.31 1 2004-10-12 www.DataSheet4U.com TLE 6361 G 1.2 Short functional description The TLE 6361 G is a multi voltage power supply system especially designed for automotive applications using a standard 12V or 24V battery as well as the new 42V powernet. The device is intended to supply 32 bit micro-controller systems which require different supply voltage rails such as 5V, 3.3V and 2.6V. The regulators for external sensors are also provided. The TLE 6361 G cascades a Buck converter block with a linear regulator and tracker block on a single chip to achieve lowest power dissipation thus being able to power the application even at very high ambient temperatures. The step-down converter delivers a pre-regulated voltage of 5.5V with a minimum current capability of 1.5A. Supplied by this step down converter three low drop linear post-regulators offer 5V, 3.3V, or 2.6V of output voltages depending on the configuration of the device with current capabilities of 800mA, 500mA and 350mA. In addition the inputs of six voltage trackers are connected to the 5.5V bus voltage. Their outputs follow the main 5V linear regulator (Q_LDO1) with high accuracy and are able to drive a current of 17mA each. The trackers can be turned on and off individually by a 16 bit serial peripheral interface (SPI). Through this interface also the status information of each tracker (i.e. short circuit) can be read out. To monitor the output voltage levels of each of the linear regulators three independent undervoltage detection circuits are available which can be used to implement the reset or an early warning function. The supervision of the µC is managed by the SPI-triggered window watchdog. For energy saving reasons while the motor is turned off, the TLE 6361 G offers a standby mode, where the quiescent current does not exceed 30µA typically. In this stand-by mode just the stand-by regulator remains active. The TLE 6361 G is based on Infineon Power technology SPT  which allows bipolar , CMOS and Power DMOS circuitry to be integrated on the same monolithic circuitry. Data Sheet, Rev. 1.31 2 2004-10-12 www.DataSheet4U.com TLE 6361 G 1.3 Pin configuration P-DSO-36-12 GND CLK CS DI DO ERR Q_STB Q_T1 Q_T2 Q_T3 Q_T4 Q_T5 Q_T6 Q_LDO3 R3 R2 R1 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 GND SLEW WAKE BOOST IN SW IN SW Bootstrap Q_LDO1 FB/L_IN FB/L_IN Q_LDO2 SEL CCP C+ CGND Figure 1 Pin Configuration (Top View), bottom heatslug and GND corner pins are connected Data Sheet, Rev. 1.31 3 2004-10-12 www.DataSheet4U.com TLE 6361 G 1.4 Pin No. 1,18,19, 36 2 Pin definitions and functions Symbol GND Function Ground; to reduce thermal resistance place cooling areas on PCB close to this pins. Those pins are connected internally to the heatslug at the bottom. SPI Interface Clock input; clocks the shiftregister; CLK has an internal active pull down and requires CMOS logic level inputs;see also chapter SPI SPI Interface chip select input; CS is an active low input; serial communication is enabled by pulling the CS terminal low; CS input should only be switched when CLK is low; CS has an internal active pull up and requires CMOS logic level inputs ;see also chapter SPI SPI Interface Date input; receives serial data from the control device; serial data transmitted to DI is a 16 bit control word with the Least Significant Bit (LSB) being transferred first; the input has an active pull down and requires CMOS logic level inputs; DI will accept data on the falling edge of CLK-signal; see also chapter SPI SPI Interface Data output; this tristate output transfers diagnosis data to the controlling device; the output will remain 3stated unless the device is selected by a low on Chip-Select CS; see also the chapter SPI Error output; push-pull output. Monitors failures in parallel to the SPI diagnosis word, reset via SPI. ERR is a latched output. Standby Regulator Output; the output is active even when the buck regulator and all other circuitry is in off mode Voltage Tracker Output T1 tracked to Q_LDO1; bypass with a 1µF ceramic capacitor for stability. It is switched on and off by SPI command. Keep open, if not needed. Voltage Tracker Output T2 tracked to Q_LDO1; bypass with a 1µF ceramic capacitor for stability. It is switched on and off by SPI command. Keep open, if not needed. Voltage Tracker Output T3 tracked to Q_LDO1; bypass with a 1µF ceramic capacitor for stability. It is switched on and off by SPI command. Keep open, if not needed. CLK 3 CS 4 DI 5 DO 6 7 8 ERR Q_STB Q_T1 9 Q_T2 10 Q_T3 Data Sheet, Rev. 1.31 4 2004-10-12 www.DataSheet4U.com TLE 6361 G 1.4 Pin No. 11 Pin definitions and functions (cont’d) Symbol Q_T4 Function Voltage Tracker Output T4 tracked to Q_LDO1; bypass with a 1µF ceramic capacitor for stability. It is switched on and off by SPI command. Keep open, if not needed. Voltage Tracker Output T5 tracked to Q_LDO1; bypass with a 1µF ceramic capacitor for stability. It is switched on and off by SPI command. Keep open, if not needed. Voltage Tracker Output T6 tracked to Q_LDO1; bypass with a 1µF ceramic capacitor for stability. It is switched on and off by SPI command. Keep open, if not needed. Voltage Regulator Output 3; 5V or 3.3V output; ouput voltage is selected by pin SEL (see also 3.4.2); For stability a ceramic capacitor of 470nF to GND is sufficient. Reset output 3, undervoltage detection for output Q_LDO3; open collector output; an external pullup resistor of 10kΩ is required Reset output 2, undervoltage detection for output Q_LDO2; open collector output; an external pullup resistor of 10kΩ is required Reset output 1, undervoltage detection for output Q_LDO1 and watchdog failure reset; open collector output ; an external pullup resistor of 10kΩ is required Charge pump capacitor connection; Add the fly-capacitor of 100nF between C+ and CCharge pump capacitor connection; Add the fly-capacitor of 100nF between C+ and CCharge Pump Storage Capacitor Output; Add the storage capacitor of 220nF between pin CCP and GND. Select Pin for output voltage adjust of Q_LDO2 and Q_LDO3 (see also 2.2.2) Voltage Regulator Output 2; 3.3V or 2.6V output; output voltage is selected by pin SEL (see also 3.4.2); For stability a ceramic capacitor of 470nF to GND is sufficient. Feedback and Linear Regulator Input; input connection for the Buck converter output 12 Q_T5 13 Q_T6 14 Q_LDO3 15 R3 16 R2 17 R1 20 21 22 23 24 CC+ CCP SEL Q_LDO2 25, 26 FB/L_IN Data Sheet, Rev. 1.31 5 2004-10-12 www.DataSheet4U.com TLE 6361 G 1.4 Pin No. 27 Pin definitions and functions (cont’d) Symbol Q_LDO1 Function Voltage Regulator Output 1; 5V output; acts as the reference for the voltage trackers.The SPI and window watchdog logic is supplied from this voltage. For stability a ceramic capacitor of 470nF to GND is sufficient. 28 Bootstrap Bootstrap Input; add the bootstrap capacitor between pin SW and pin Bootstrap, the capcitance value should be not lower than 2% of the Buck converter output capacitance SW Switch Output; connect both pins externally through short lines directly to the cathode of the catch diode and the Buck circuit inductance. Supply Voltage Input; connect both pins externally through short lines to the input filter/the input capacitors. Boost Input; for switching loss minimization connect a diode (cathode directly to boost pin) in series with a 100nF ceramic capacitor to the IN pin and from the anode of the diode to the buck converter output a 22Ω resistor. Recommended for 42V applications, in 12/24V applications connect boost directly to IN Wake Up Input; a positive voltage applied to this pin turns on the device Slew control Input; a resistor to GND defines the current slope in the buck switch for reduced EME 29, 31 30, 32 33 IN BOOST 34 35 WAKE SLEW Data Sheet, Rev. 1.31 6 2004-10-12 www.DataSheet4U.com TLE 6361 G 1.5 Basic block diagram TLE 6361 Standby Regulator 2.5V Q_STB Boost SW 2* IN 2* BUCK REGULATOR Driver Bootstrap Slew OSZ PWM ErrorAmplifier Internal Reference feedback FB/L_IN 2* C+ Charge Pump C- Protection CCP Wake Power Down Logic SEL R1 Linear Reg. 1 Reset Logic Linear Reg. 2 Linear Reg. 3 Q_LDO1 R2 Q_LDO2 µ-controller / memory supply R3 Q_LDO3 ref Window Watchdog ref Tracker 5V Tracker 5V Tracker 5V Q_T1 Q_T2 CLK ref Q_T3 CS SPI 16 bit DI ref Tracker 5V Tracker 5V Tracker 5V Q_T4 Sensor supplies (off board supplies) ref Q_T5 DO ref Q_T6 ERR GND 4* Figure 2 Block Diagram Data Sheet, Rev. 1.31 7 2004-10-12 www.DataSheet4U.com TLE 6361 G 2 Detailed circuit description In the following major buck regulator blocks, the linear voltage regulators and trackers, the undervoltage reset function, the watchdog and the SPI are described in more detail. For applications information e.g. choice of