PULSE-WIDTH-MODULATION CONTROL CIRCUITS

UNISONIC TECHNOLOGIES CO., LTD TL5001 PULSE-WIDTH-MODULATION CONTROL CIRCUITS DESCRIPTION The UTC TL5001 incorporates on a single monolithic chip all the functions required for a pulse width modulation (PWM) control circuit. Designed primarily for power-supply control, It contains an error amplifier, a regulator, an oscillator, a PWM comparator with a dead-time-control input, undervoltage lockout (UVLO), short-circuit protection (SCP), and an open-collector output transistor. The error-amplifier common-mode voltage ranges from 0V to 1.5V. The noninverting input of the error amplifier is connected to a 1-V reference. Dead-time control (DTC) can be set to provide 0% to 100% dead time by connecting an external resistor between DTC and GND. The oscillator frequency is set by terminating RT with an external resistor to GND. During low Vcc conditions, the UVLO circuit turns the output off until Vcc recovers to its normal operating range. LINEAR INTEGRATED CIRCUIT DIP-8 SOP-8 *Pb-free plating product number: TL5001L FEATURES *Complete PWM power control www.DataSheet4U.com *3.6-V to 40-V operation *Internal under voltage-lockout circuit *Internal short-circuit protection *Oscillator frequency : 20kHz to 500kHz *Variable dead timer provides control over total range ORDERING INFORMATION Ordering Number Normal Lead Free Plating TL5001-D08-T TL5001L-D08-T TL5001-S08-R TL5001L-S08-R TL5001-S08-T TL5001L-S08-T Package DIP-8 SOP-8 SOP-8 Packing Tube Tape Reel Tube TL5001L-D08-R (1)Packing Type (2)Package Type (3)Lead Plating (1) R: Tape Reel, T: Tube (2) D08: DIP-8, S08: SOP-8 (3) L: Lead Free Plating Blank: Pb/Sn , www.unisonic.com.tw Copyright © 2005 Unisonic Technologies Co., Ltd 1 of 13 QW-R103-016,B TL5001 PIN CONFIGURATION LINEAR INTEGRATED CIRCUIT VOUT VCC 1 2 8 7 GND RT DTC COMP FB 3 4 6 5 SCP UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 13 QW-R103-016,B TL5001 LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE (unless otherwise specified)* PARAMETER SYMBOL RATINGS UNIT Supply Voltage (note 1) VCC 41 V Amplifier Input Voltage VI(FB) 20 V Output Voltage VOUT 51 V Output Current IOUT 21 mA Output Peak Current IO(PEAK) 100 mA Continuous Total Power Dissipation See dissipation rating table Operating Ambient Temperature Range TOPR -20 ~ +85 °C Storage Temperature Range TSTG -65 ~ +150 °C Note 1. All voltage values are with respect to the network ground terminal. 2. Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. * Stresses beyond those listed under” absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under” recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE DIP-8 SOP-8 TA≤25°C POWER RATING 1000mW 725mW DERATING FACTOR ABOVE TA=25°C 8.0mW/°C 5.8mW/°C TA=70°C POWER RATING 640mW 464mW TA=70°C TA=70°C POWER RATING POWER RATING 520mW 200mW 377mW 145mW RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Voltage Amplifier Input Voltage Output Voltage Output Current COMP Source Current COMP dc Load Resistance Oscillator Timing resistor Oscillator Frequency Operating Ambient Temperature Range SYMBOL VCC VI(FB) VOUT IOUT MIN 3.6 0 MAX 40 1.5 50 20 45 250 500 85 UNIT V V V mA A k k kHz °C Rt fosc TA 100 15 20 -20 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 13 QW-R103-016,B TL5001 PARAMETER Reference Output Voltage Input Regulation Output Voltage Change with Temperature Undervoltage Lockout Threshold Voltage Upper Lower Reset VTHR TA= 25°C TA= 25°C TA= 25°C TA= 25°C TA= 25°C No pullup No pullup TA= 25°C SYMBOL VOUT LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING FREE-AIR TEMPERATURE RANGE (Vcc=6V, fosc=100kHz, all typical values at TA=25°C, unless otherwise noted) TEST CONDITIONS COMP Connected to FB Vcc=3.6V ~ 40V TA= -20°C ~ 25°C TA= 25°C ~ 85°C MIN 0.95 -10 -10 TYP 1 2 -1 2 3 2.8 2.55 200 1.00 185 60 -15 1.5 100 15 1 -0.4 -0.4 -0.2 1 1.05 230 120 -20 MAX 1.05 12.5 10 10 UNIT V mV mV/V V V V mV V mV mV µA V kHz kHz kHz kHz kHz kHz V µA V V nA V V dB MHz µA µA V µA mA 1.5 2.1 mA mA Hysteresis Short Circuit Protection SCP Threshold voltage SCP Voltage, Latched SCP Voltage, UVLO Standby Input Source Current SCP Comparator 1 Threshold Voltage Oscillator Frequency Standard Deviation of Frequency Frequency Change with Voltage Frequency Change with Temperature Voltage at RT Dead-time Control Output (source) Current Input Threshold Voltage Error Amplifier Input Voltage Input Bias Current Positive Negative Open-Loop Voltage Amplification Unity-Gain Bandwidth Output (sink) Current Output (source) Current Output Output Saturation Voltage Output Voltage Swing Off-State Current Short-Circuit Output Current Total Device Standby Supply Current (Off state) Average Supply Current Note: Output source current at RT 2.1 100 0.95 140 -10 f Rt=100kΩ Vcc=3.6V ~ 40V TA= -40°C ~ 25°C TA= -20°C ~ 25°C TA= 25°C ~ 85°C -4 -4 -4 4 4 4 VRT IO(SOURCE) VI(THR) VIN II(BIAS) VO(SW) GV IO(SINK) IO(SOURCE) VO(SAT) IOFF IO(SC) ISTN-BY Rt=100kΩ VI(FB)=1.2V, COMP=1V VI(FB)=0.8V, COMP=1V IOUT=10mA VOUT=50V,Vcc=0 VOUT=50V VOUT=6V 100 -45 V(DT)=1.5V Duty cycle=0% Duty cycle=100% Vcc=3.6V ~ 40V 0.9*IRT (NOTE) 1.1*IRT (NOTE) 0.5 0.7 1.3 1.5 1.5 -500 0.4 0 1.5 -160 2.3 0.3 80 1.5 600 -70 1.5 2 10 10 40 1 1.4 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 13 QW-R103-016,B TL5001 SCHEMATIC FOR TYPICAL APPLICATION VIN + LINEAR INTEGRATED CIRCUIT TSP1101 2 VCC SCP VOUT COMP VOUT + 5 1 3 UTC TL5001 6 7 DTC RT GND 8 FB 4 FUNCTIONAL BLOCK DIAGRAM VCC 2 UVLO IDT 1V 1.5V Error Amplifier + FB 4 3 COMP Reference Voltage 1V 2.5V PWM/DTC Comparator RT 7 DTC 6 OUT 1 scp Comparator 1 OSC SCP 5 scp Comparator 2 8 GND UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 13 QW-R103-016,B TL5001 DETAILED DESCRIPTION VOLTAGE REFERENCE LINEAR INTEGRATED CIRCUIT A 2.5-V regulator operating from Vcc is used to power the internal circuitry of the TL5001 and as a reference for the error amplifier and SCP circuit. A resistive divider provides a 1-V reference for the error amplifier non-inverting input which typically is within 2% of nominal over the operating temperature range. ERROR AMPLIFIER The error amplifier compares a sample of the dc-to-dc converter output voltage to the 1-V reference and generates an error signal for the PWM comparator. The dc-to-dc converter output voltage is set by selecting the error –amplifier gain (see Figure 1), using the following expression. VOUT=(1+R1/R2) (1V) Compensation Network R1 VI(FB) R2 3 COMP 4 FB + 8 GND VREF=1V To PWM Comparator Figure 1.Error-Amplifier Gain Setting The error-amplifier output is brought out as COMP for use in compensating the dc-to-dc converter control loop for stability. Because the amplifier can only source 45µA, the total dc load resistance should be 100kΩ or more. OSCILLATOR/PWM The oscillator frequency (fosc) can be set between 20kHz and 500kHz by connecting a resistor between RT and GND .Acceptable resistor values range from 15 kΩ to 250 kΩ. The oscillator frequency can be determined by using the graph shown in Figure 5. The oscillator output is a triangular wave with a minimum value of approximately 0.7V and a maximum value of approximately 1.3V. The PWM comparator compares the error-amplifier output voltage and the DTC input voltage to the triangular wave and turns the output transistor off whenever the triangular wave is greater than the lesser of the two inputs. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 13 QW-R103-016,B TL5001 DETAILED DESCRIPTION(Cont.) DEAD TIME CONTORL (DTC) LINEAR INTEGRATED CIRCUIT DTC provides a means of limiting the output-switch duty cycle to a value less than 100%, which is critical for boost and flyback converters. A current source generates a reference current (IDT) at DTC that is nominally equal to the current at the oscillator timing terminal, RT. Connecting a resistor between DTC and GND generates a dead-time reference voltage (VDT), which the PWM/DTC comparator compares to the oscillator triangle wave as described in the previous section. Nominally, the maximum duty cycle is 0% when VDT is 0.7V or less and 100% when VDT is 1.3V or greater. Because the triangle wave amplitude is a function of frequency and the source impedance of RT is relatively high(1250Ω),choosing RDT for a specific maximum duty cycle, D, is accomplished using the following equation and the voltage limits for the frequency in question as found in Figure 11(Voscmax and Voscmin are the maximum and minimum oscillator levels): RDT=(Rt +1250)[D(Vosc max-Vosc min)+Vosc min] Where RDT and Rt are in ohms, D in decimal Soft start can be implemented by paralleling the DTC resistor with a capacitor (CDT) as shown in Figure 2. During soft start, the voltage at DTC is derived by the following equation: VDT≈IDTRDT(1-e(-t/RDTCDT)) 6 DTC CDT RDT UTC TL5001 Figure 2. Soft- Start Circuit If the dc-to-dc converter must be in regulation within a specified period of time, the time constant, RDTCDT, should be t0/3 to t0/5.The UTC TL5001 remains off unit VDT≈0.7V, the minimum ramp value. CDT is discharged every time UVLO or SCP becomes active. UNDERVOLTAGE-LOCKOUT (UVLO) PROTECTION The undervoltage-lockout circuit turns the output transistor off and resets the SCP latch whenever the supply voltage drops too low (approximately 3V at 25 ) for proper operation. A hysteresis voltage of 200mV eliminates false triggering on noise and chattering. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.