3-Channel Low-Power EDTV/SDTV Video Line Driver

www.DataSheet4U.com THS7318 www.ti.com SLOS517A – JANUARY 2007 – REVISED FEBRUARY 2007 3-Channel Low-Power EDTV/SDTV Video Line Driver With Low-Pass Filters FEATURES • • • • • • • • • • • Single Supply: 2.85 V to 5 V Low Total Supply Current = 4.5 mA (max) Low Power Mode: 5 µW (max) Integrated DAC Reconstruction Filters Video Line Driver Outputs with 6 dB Gain Rail-to-Rail Output RoHS Compliant 9-Pin Wafer Scale Package DESCRIPTION The THS7318 is a very low power single-supply 3 channel device designed to process Y’, P’B, P’R enhanced definition TV and Y’, C’, and CVBS standard definition TV signals. It integrates circuitry to perform signal processing commonly required in video output applications. All channels incorporate 3rd-order 20-MHz Butterworth DAC reconstruction filters designed for video systems with 54 MSPS DAC sampling rates like NTSC/PAL 480p/576p EDTV and 480i/576i SDTV video. Rail-to-Rail output drivers on all channels allow for both ac and dc coupled outputs. The low quiescent current makes it an excellent choice for USB powered or portable video applications. The THS7318 is available in a 9-pin NanoFree™ wafer scale package. It is specified for operation from 0°C to 70°C. APPLICATIONS Personal Media Players Digital Cameras Cellular Phone Video Output Buffering USB/Portable Low Power Video Buffering THS7318 BLOCK DIAGRAM Y’ IN DC Offset PB’ IN / CVBS IN + LPF DC Offset PR’ IN / C’ IN Bias Control + LPF DC Offset EN 6 dB PR’ OUT / C’ OUT 6 dB PB’ OUT / CVBS OUT + LPF 6 dB Y’ OUT GND Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated THS7318 www.ti.com SLOS517A – JANUARY 2007 – REVISED FEBRUARY 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE VSS VI IO Supply voltage, VS+ to GND Input voltage Output current Continuous power dissipation TJ Tstg Maximum junction temperature Storage temperature range HBM ESD ratings CDM MM (1) (2) (3) Any condition (2) UNIT V V mA °C °C °C V V V 5.5 –0.4 to VS+ ±100 See Dissipation Rating Table 150 125 –65 to 150 2000 1500 200 Continuous operation, long term reliability (3) Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may degrade device reliability. The absolute maximum junction temperature under any condition is limited by the constraints of the silicon process. The absolute maximum junction temperature for continuous operation is limited by the package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device. DISSIPATION RATINGS (1) PACKAGE YZF (1) (2) θJC (°C/W) 38 θJA (°C/W) 105 POWER RATING (2) (TJ = 125°C) TA = 25°C 950 mW TA = 70°C 428 mW This data was taken with the JEDEC High-K test PCB. Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase and long-term reliability starts to be reduced. Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and reliability. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN VS+ TA Supply voltage Ambient temperature 2.85 0 MAX 5 70 UNIT V °C 2 Submit Documentation Feedback THS7318 www.ti.com SLOS517A – JANUARY 2007 – REVISED FEBRUARY 2007 PACKAGING/ORDERING INFORMATION PACKAGED DEVICES THS7318YZFT THS7318YZFR (1) PACKAGE TYPE (1) Wafer Scale 9-pin PART CODE BYR TRANSPORT MEDIA, QUANTITY Tape and Reel, 250 Tape and Reel, 3000 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. NanoFree™ Placement and Removal Procedures These procedures are generic guidelines to rework NanoFree™ packages assembled on a 0.056-inch thick FR4 board. It’s recommended to modify heating profiles for different board thicknesses and equipment used. The assembly process recommended below should be used with a new device. Do not reuse the part after it is removed. Air-VacEngineering (www.air-vac-eng.com) has established NanoFreeTM reflow profiles for their Hot Gas (convection) rework equipment DRS-24NC. The NMX090DVG nozzle is recommended for use with the YZF package. Customers can use other comparable hot gas (convection) equipment and tooling. Placement 1. Apply flux paste to component 2. Align device over pads 3. Place device on board. Care must be taken to prevent over-travel during placement which may damage the part or vacuum tip. 4. Raise nozzle 0.05" 5. Preheat board to 90°C, nozzle warming up 20% air flow, 125°C 6. Soak Stage—20% air flow, 225°C, 90 seconds 7. Ramp Stage—20% air flow, 335°C, 30 seconds 8. Reflow Stage—25% air flow, 370°C, 65 seconds 9. Cool down Stage—40% air flow, 25°C, 50 seconds Removal 1. Apply flux paste to component 2. Align Nozzle over part to be removed 3. Maintain nozzle 0.050"over device. Care must be taken to prevent over-travel of the vacuum tip which may damage the part or vacuum tip when measuring this distance. 4. Preheat board to 90°C, nozzle warming up 20% air flow, 125°C 5. Soak Stage—20% air flow, 225°C, 90 seconds 6. Ramp Stage—20% air flow, 335°C, 30 seconds 7. Reflow Stage—25% air flow, 370°C, 65 seconds 8. Enable Vacuum at the end of the reflow cycle, lower vacuum nozzle, and remove part 9. Cool down Stage—40% air flow, 25°C, 50 seconds 10. Turn off the vacuum and remove part from nozzle. 11. Care should be used if the device is to be returned to TI for failure analysis. Using any metal tweezers or rough handling can damage the part, and render it un-analyzable. Submit Documentation Feedback 3 THS7318 www.ti.com SLOS517A – JANUARY 2007 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS VS+ = 3.3V, 27°C, Y’ and P’R / C’ channels: RL = 150 Ω and CL = 6.2 pF to GND P’B / CVBS channel: 75 Ω and CL = 6.2 pF to GND (unless otherwise noted) PARAMETER DC CHARACTERISTICS VSS IQ VSD Supply voltage range Quiescent supply current Shutdown supply current Output DC level shift voltage Input bias current Input resistance / capacitance Voltage gain Channel to Channel Gain Match All Channels PSRR VOH Power supply rejection Output voltage swing high P’B output high minus output offset Output short-circuit current Max current into EN pin Disable threshold Enable threshold Output impedance in shutdown AC PERFORMANCE ±0.1 dB Bandwidth ±1.0 dB Bandwidth –3 dB Bandwidth Normalized stop band gain Differential gain Differential phase Group delay variation Signal to noise ratio tr/tf Rise / fall time Positive/ negative slew rate THD at 1MHz (1) Relative to 1 MHz Relative to 1 MHz Relative to 1 MHz f = 43 MHz, Relative to 1 MHz NTSC and PAL NTSC and PAL f = 11 MHz w/ref to 1 MHz VOUT = 2-VPP sine wave VOUT = 2-V step VOUT = 2-V step At 1MHz, 2 VPP 14 17 11 17 20 –21 0.05 0.03 4 62 20 80 73 –12 MHz MHz MHz dB % deg ns dB ns V/µs dBc C A B A C C C C C C C DC Y’ and P’R / C’ channel, 150 Ω to GND P’B / CVBS channel, 50 Ω to GND At Vs+ = 3.135 V, P’B / CVBS channel, 50 Ω to GND Y’ and P’R / C’ channel P’B / CVBS channel EN = Low EN = High Low = off High = on EN = Low 2.1 20 47 2.85 2.6 2.3 2.96 2.9 2.65 70 100 <1 <1 0.6 1.98 EN = High EN = Low All channels Y’ and P’B / CVBS channels P’R / C’ channel 110 –100 –170 2.85 2.8 3.3 3.5 0.150 150 –160 –280 2.4/1 2 ±0.14 2.02 ±1 5 4.5 <1 200 –240 –415 V mA µA mV nA nA MΩ/pF V/V % dB V V V mA mA µA µA V V kΩ B A A A A A C A A A A A A C C A A A A C TEST CONDITIONS MIN TYP MAX UNIT TEST LEVEL (1) Test levels: (A) 100% tested at 25°C. Overtemperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. 4 Submit Documentation Feedback THS7318 www.ti.com SLOS517A – JANUARY 2007 – REVISED FEBRUARY 2007 THS7318 (Top View) XXXXXX BYRS Device Code Date/Trace Code Assembly Site Code Pin A1 Index THS7318 (Bottom View) Vs+ Y’ IN C EN Y’ OUT PB’ IN / CVBS IN B PB’ OUT / CVBS OUT PR’ IN / C’ IN A 1 2 GND 3 PR’ OUT / C’ OUT TERMINAL FUNCTIONS COL. 1 1 1 2 2 2 3 3 3 ROW C B A C B A C B A PIN NAME Y' IN PB’ IN / CVBS IN PR’ IN / C’ IN Vs+ EN GND Y’ OUT PB’ OUT / CVBS OUT PR’ OUT / C’ OUT Luma input Component video input / composite video input Component video input / chroma input Positive power supply input Enable input. Logic high enables part. Logic low disables part. To insure proper operation, this pin must be driven and cannot be left floating. Ground reference pin for all interna