3-Channel Low Power SDTV Video Amplifier

www.DataSheet4U.com THS7313 www.ti.com SLOS483 – NOVEMBER 2005 3-Channel Low Power SDTV Video Amplifier with I2C Control, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes FEATURES • • • 3 SDTV Video Amplifiers for CVBS, S-Video, Y'P'BP'R 480i/576i, or G'B'R' Video Systems I2C™ Control of All Functions on Each Channel Integrated Low-Pass Filters – 5th Order, 8-MHz Butterworth • 0.5-dB Attenuation at 5.5 MHz • 48-dB Attenuation at 27 MHz Selectable Input Bias Modes – AC-Coupled with Sync-Tip Clamp – AC-Coupled with Bias – DC-Coupled with 135-mV Input Shift – DC-Coupled 2:1 Input MUX Allows Multiple Input Sources Built-in 6-dB Gain (2 V/V) SAG Correction Capable 2.7-V to 5-V Single Supply Operation Individual Disable (<1 µA) and Mute Control Rail-to-Rail Output: – Output Swings within 100 mV from the Rails Which Allows AC or DC Output Coupling – Able to Drive up to 2 Video Lines – 75 Ω Low 16.6-mA (3.3 V) Total Quiescent Current Low Differential Gain/Phase of 0.07% / 0.12° 3.3 V Video DAC / Encoder R DC + 135 mV DC AC BIAS AC Sync TIP Clamp APPLICATIONS • • • Set Top Box Output Video Buffering PVR/DVDR Output Buffering USB/Portable Low Power Video Buffering DESCRIPTION Fabricated using the new complimentary silicon-germanium (SiGe) BiCom-III process, the THS7313 is a low-power, single-supply 2.7-V to 5-V, 3-channel integrated video buffer. It incorporates a 5th order Butterworth filter which is useful as a digital-to-analog converter (DAC) reconstruction filter or an analog-to-digital converter (ADC) anti-aliasing filter. The 8-MHz filter is a perfect choice for SDTV video which includes composite (CVBS), S-Video, Y’U’V’, G'B'R', and Y’P’BP’R 480i/576i. Each channel of the THS7313 is individually I2C configurable for all functions which makes it flexible for any application. Its rail-to-rail output stage allows for both ac and dc coupling applications. The 6-dB gain along with the built-in SAG correction allows for maximum flexibility as an output video buffer. The 16.6 mA total quiescent current at 3.3 V (55 mW) makes it an excellent choice for USB powered or portable video applications. While fully disabled, the THS7313 consumes less than 1 µA. The THS7313 is available in a small lead-free and RoHS compliant TSSOP-20 package. • • • • • • • • • In A In B 2:1 X1 LPF + 675 W Out 47 mF 75 W Video Out 8 MHz SAG MUTE 1 kW 878 W 150 W External Input 75 W 33 mF 75 W SDA SCL I2C-A1 I2C-A0 3.3 V Figure 1. 3.3 V Single-Supply DC-Input/AC-Video Output System w/SAG Correction (1 of 3 Channels Shown) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. I2C is a trademark of Philips Electronics. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated THS7313 www.ti.com SLOS483 – NOVEMBER 2005 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DESCRIPTION (CONTINUED) As part of the THS7313 flexibility, the 2:1 MUX input can be selected for ac or dc coupled inputs. The ac coupled modes include a sync-tip clamp option for CVBS or Y' signals, or a fixed bias for the C/P'B/P'R channels. The dc input options include a dc input or a dc + 135-mV input offset shift to allow for a full sync dynamic range at the output with 0-V input. PACKAGING/ORDERING INFORMATION PACKAGED DEVICES (1) THS7313PW THS7313PWR (1) PACKAGE TYPE TSSOP-20 TRANSPORT MEDIA, QUANTITY Rails, 70 Tape and reel, 2000 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT VSS VI IO TJ TJ Tstg Supply voltage, VS+ to GND Input voltage Output current Continuous power dissipation Maximum junction temperature, any condition (2) Maximum junction temperature, continuous operation, long term reliability (3) Storage temperature range Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds HBM ESD ratings CDM MM (1) (2) (3) 5.5 V –0.4V to VS+ ±125 mA See Dissipation Rating Table 150°C 125°C –65°C to 150°C 300°C 2000 V 750 V 100 V Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may degrade device reliability. The absolute maximum junction temperature under any condition is limited by the constraints of the silicon process. The absolute maximum junction temperature for continuous operation is limited by the package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device. DISSIPATION RATINGS PACKAGE TSSOP – 20 (PW) (1) (2) θJC (°C/W) 32.3 θJA (°C/W) 83 (2) POWER RATING (1) (TJ = 125°C) TA = 25°C 1.2 W TA = 85°C 0.48 W Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase and long-term reliability starts to be reduced. Thermal management of the final PCB strives to keep the junction temperature at or below 125°C for best performance and reliability. This data was taken with the JEDEC High-K test PCB. For the JEDEC low-K test PCB, the θJA is 125.8°C. 2 THS7313 www.ti.com SLOS483 – NOVEMBER 2005 RECOMMENDED OPERATING CONDITIONS MIN VSS TA Supply voltage, VS+ Ambient temperature 2.7 –40 NOM MAX 5 85 UNIT V °C ELECTRICAL CHARACTERISTICS, VS+ = 3.3 V RL = 150 Ω to GND, Input Bias = dc, SAG pin shorted to the output pin (unless otherwise noted) TYP PARAMETER AC PERFORMANCE Small-signal bandwidth (–3 dB) Large-signal bandwidth (–3 dB) Group delay Group delay variation with respect to 100 kHz Group delay matching Attenuation with respect to 100 kHz Mute feed-thru Differential gain Differential phase Total harmonic distortion Signal to noise ratio Channel-to-Channel crosstalk MUX Isolation AC gain – All channels Output impedance DC PERFORMANCE Output offset voltage Average offset voltage drift Bias output voltage Sync tip clamp output voltage Input bias current Average bias current drift Bias = dc Bias = dc Bias = dc + 135 mV, VI = 0 V Bias = ac Bias = ac STC Bias = dc - implies Ib out of the pin Bias = dc Bias = ac STC, Low bias Sync tip clamp bias current Bias = ac STC, Mid bias Bias = ac STC, High bias INPUT CHARACTERISTICS Input voltage range Input resistance Input capacitance OUTPUT CHARACTERISTICS RL = 150 Ω to Midrail High output voltage swing RL = 150 Ω to GND RL = 75 Ω to Midrail RL = 75 Ω to GND 3.15 3.05 3.05 2.9 2.9 2.85 2.8 2.65 2.8 2.75 2.7 2.55 2.8 2.75 2.7 2.55 V V V V Min Min Min Min Bias = dc - limited by output Bias = ac bias mode Bias = dc, dc + 135 mV, ac STC 0/1.57 19 3 2 0/1.52 0/1.47 0/1.47 V kΩ MΩ pF Min/Max 1.8 5.8 7.8 0.6/3.3 4.3/8.2 6.2/10.8 0.5/3.5 4.1/8.4 6/11 290 1.65 290 –0.6 235/345 1.5/1.8 210/370 –4 215/360 1.45/1.85 200/380 –5 35 90 95 95 20 200/375 1.45/1.85 195/385 –5 10 0.4/3.6 4/8.5 5.9/11.1 mV µV/°C mV V mV µA nA/°C µA µA µA Min/Max Min/Max Min/Max Min/Max Min/Max Min/Max Max Max VO– 0.2 VPP (1) VO– 2 VPP (1) f = 100 kHz f = 5.1 MHz Channel-to-Channel f = 5.75 MHz f = 27 MHz f = 1 MHz NTSC/PAL NTSC/PAL f = 1 MHz, VO = 2 VPP Unified weighting 100 kHz to 6 MHz f = 1 MHz f = 5.1 MHz f = 100 kHz f = 10 MHz 8 8 63 13 0.5 0.5 48 -80 0.07%/0.15 % 0.12°/0.1° –62 82 –63 73 6 0.75 5.7/6.3 5.65/6.35 5.65/6.35 dB dB dB dB dB Ω Min/Max -0.2 / 2 36 -0.4 / 2.2 35 -0.5 / 2.3 34 6.7/9.3 6.55/9.45 6.5/9.5 MHz MHz ns ns ns dB dB dB Min/Max Min Min/Max TEST CONDITIONS 25°C 25°C OVERTEMPERATURE 0°C to 70°C –40°C to 85°C UNITS MIN/MAX (1) The Min/Max values listed are specified by design only. 3 THS7313 www.ti.com SLOS483 – NOVEMBER 2005 ELECTRICAL CHARACTERISTICS, VS+ = 3.3 V (continued) RL = 150 Ω to GND, Input Bias = dc, SAG pin shorted to the output pin (unless otherwise noted) TYP PARAMETER TEST CONDITIONS RL = 150 Ω to Midrail Low output voltage swing RL = 150 Ω to GND RL = 75 Ω to Midrail RL = 75 Ω to GND Output current POWER SUPPLY Maximum operating voltage Minimum operating voltage Maximum quiescent current Minimum quiescent current Total quiescent current Power supply rejection (+PSRR) Per channel VI = 200 mV Per channel VI = 200 mV All channels ON, VI = 200 mV VS+ = 3.5 V to 3.1 V (2) OVERTEMPERATURE 25°C 0.24 0.17 0.33 0.17 45 45 0°C to 70°C 0.27 0.2 0.36 0.2 42 42 –40°C to 85°C 0.28 0.21 0.37 0.21 40 40 UNITS V V V V mA mA MIN/MAX Max Max Max Max Min Min 25°C 0.14 0.09 0.24 0.09 70 70 RL = 10 Ω to Midrail, sourcing RL = 10 Ω to Midrail, sinking 3.3 3.3 6 6 16.6 59 5.5 2.6 7.2 4.8 5.5 2.6 7.4 4.6 5.5 2.6 7.5 4.5 V V mA mA mA Max Min Max Min 37 35 35 dB Min DISABLE CHARACTERISTICS Quiescent current Turn-on time delay (tON) Turn-on time delay (tOFF) All 3 channels disabled (3) 0.1 5 2 µA µs µs Time reaches 50% of final value after I2C control is completed (2) (3)