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Part Number |
TDA9952 |
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Manufacturer |
Philips Semiconductors |
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Semiconductor DataSheet |
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DataSheet View |
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INTEGRATED CIRCUITS
DATA SHEET
TDA9952 10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
Preliminary specification Supersedes data of 2001 Jul 04 2002 Aug 21
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Philips Semiconductors Preliminary specification
10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
FEATURES • Sample rate = 25 Msps;10-bit resolution • Single 3.0 V supply operation (2.2 to 3.6 V operation for the digital outputs) • Low power consumption: only 115 mW at 2.7 V • Power consumption in standby mode: 4.5 mW (typical value) • Programmable gain amplifier: gain range = 36 dB in 0.1 dB steps • Correlated double sampling • Internal input buffer for the correlated double sampling • Fully programmable via a 3-wire serial interface • 8-bit DAC included for external analog settings • TTL-compatible inputs and CMOS-compatible outputs. APPLICATIONS • Video camcorders • Digital still cameras • PC-cameras. ORDERING INFORMATION PACKAGES TYPE NUMBER NAME TDA9952HL TDA9952HN LQFP48 HVQFN48 DESCRIPTION plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm plastic, heatsink very thin quad flat package; no leads; 48 terminals; body 7 × 7 × 0.85 mm GENERAL DESCRIPTION
TDA9952
The TDA9952 is a 10-bit analog-to-digital interface for CCD cameras. The device consists of a Correlated Double Sampling (CDS) circuit, a digitally Programmable Gain Amplifier (PGA), a black level clamp and a 10-bit Analog-to-Digital Converter (ADC). An internal CDS input buffer is incorporated in order to avoid using an external buffer that would consume more power and therefore optimizing the application for low noise, low power working. The PGA gain, the ADC clamp level and other settings are controlled via a 3-wire serial digital interface. An additional DAC is provided for system controls. The TDA9952 operates from a single 3 V power supply (2.7 V minimum) and dissipates 135 mW (typical value).
VERSION SOT313-2 SOT619-1
2002 Aug 21
2
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Philips Semiconductors Preliminary specification
10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO ADCres Vi(CDS)(p-p) fpix(max) fpix(min) DRPGA Ntot(rms) Ein(rms) Ptot PARAMETER analog supply voltage digital supply voltage digital outputs supply voltage analog supply current digital supply current digital outputs supply current ADC resolution maximum CDS input voltage (peak-to-peak value) maximum pixel rate minimum pixel rate PGA dynamic range total noise from CDS input to ADC output (RMS value) equivalent input noise voltage (RMS value) total power consumption PGA code = 00; see Fig.8 PGA code = 383 VCCA = VCCD = 3 V; VCCO = 2.5 V VCCA = VCCD = 2.7 V; VCCO = 2.2 V standby mode OCCD(max) = ±100 mV OCCD(max) = ±200 mV VCC = 2.85 V VCC ≥ 3.0 V all clamps active fpix = 25 MHz CONDITIONS MIN. 2.7 2.7 2.2 − − TYP. 3.0 3.0 2.5 43 2.0 0.5 10 − − − − − 36 0.4 145 135 115 4.5
TDA9952
MAX. 3.6 3.6 3.6 − − − − − − − 1 2 − − − − − −
UNIT V V V mA mA mA bits mV mV MHz MHz MHz dB LSB µV mW mW mW
fpix = 25 MHz; CL = 10 pF; − input ramp response time is 800 µs − 650 800 25 − − − − − − − −
2002 Aug 21
3
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SHP 45 SHD 46 VCCA1 1 AGND1 2 VCCA6 41 AGND6 CLPOB CLPDM 40 44 48 BLK CLK OE 43 47 39 22 21 CDS CLOCK GENERATOR 37 38 DGND1 VCCD1 OGND2 VCCO2 CPCDS1 CPCDS2 VCCA2 AGND2 IN 8
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BLOCK DIAGRAM
Philips Semiconductors
10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
TDA9952
CLAMP 9 7 3 4 CORRELATED DOUBLE SAMPLING PGA SHIFT
BLACK LEVEL SHIFT
36 35
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
input buffer
34 33 DATA FLIPFLOP 32 OUTPUT BUFFER 31 30 29 28 27
BLANKING 10-bit ADC
Fig.1 Block diagram.
handbook, full pagewidth
4
n.c. 25, 26 CLAMP VCCA3 AGND3 14 5 OFD DAC OFDOUT 11 12 6 TEST AGND4
Vref 9-BIT REGISTER 6-BIT REGISTER 24 23 8-BIT REGISTER INIT-ONPOWER SERIAL INTERFACE 10 OGND1 VCCO1 DCLPC
REGULATOR 20 42
13
15
16
19
18
17
FCE629
Preliminary specification
AGND5
VCCA4
VCCA5
SEN
SCLK SDATA VSYNC
STDBY
TDA9952
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Philips Semiconductors Preliminary specification
10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
PINNING SYMBOL VCCA1 AGND1 AGND2 IN AGND3 AGND4 VCCA2 CPCDS1 CPCDS2 DCLPC OFDOUT TEST AGND5 VCCA3 VCCA4 VCCA5 SDATA SCLK SEN VSYNC VCCD1 DGND1 VCCO1 OGND1 n.c. n.c. D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 OGND2 VCCO2 OE AGND6 2002 Aug 21 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 analog supply voltage1 analog ground 1 analog ground 2 input signal from CCD analog ground 3 analog ground 4 analog supply voltage 2 clamp storage capacitor pin 1 clamp storage capacitor pin 2 regulator decoupling pin analog output of the additional 8-bit control DAC test mode input pin (should be connected to AGND5) analog ground 5 analog supply voltage 3 analog supply voltage 4 analog supply voltage 5 serial data input for serial interface control serial clock input for serial interface strobe pin for serial interface vertical sync pulse input digital supply voltage 1 digital ground 1 digital output supply voltage 1 digital output ground 1 not connected not connected ADC digital output 0 (LSB) ADC digital output 1 ADC digital output 2 ADC digital output 3 ADC digital output 4 ADC digital output 5 ADC digital output 6 ADC digital output 7 ADC digital output 8 ADC digital output 9 (MSB) digital output ground 2 digital output supply voltage 2 DESCRIPTION
TDA9952
output enable control input (LOW: outputs active; HIGH: outputs in high-impedance) analog ground 6 5
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Philips Semiconductors Preliminary specification
10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
SYMBOL VCCA6 STDBY BLK CLPOB SHP SHD CLK CLPDM PIN 41 42 43 44 45 46 47 48 analog supply voltage 6 DESCRIPTION
TDA9952
standby mode control input (LOW: TDA9952 active; HIGH: TDA9952 standby) blanking control input clamp pulse input at optical black preset sample-and-hold pulse input data sample-and-hold pulse input data clock input clamp pulse input at dummy pixel
handbook, full pagewidth
VCCA1 AGND1 AGND2 IN AGND3 AGND4 VCCA2 CPCDS1 CPCDS2
1 2 3 4 5 6
37 OGND2
48 CLPDM
38 VCCO2
40 AGND6
44 CLPOB
41 VCCA6
42 STDBY
46 SHD
45 SHP
47 CLK
43 BLK
39 OE
36 D9 35 D8 34 D7 33 D6 32 D5 31 D4
TDA9952HL
7 8 9 30 D3 29 D2 28 D1 27 D0 26 n.c. 25 n.c.
DCLPC 10 OFDOUT 11 TEST 12
AGND5 13
VCCA3 14
VCCA4 15
VCCA5 16
SDATA 17
SCLK 18
SEN 19
VSYNC 20
VCCD1 21
DGND1 22
VCCO1 23
OGND1 24
FCE483
Note: the HVQFN package pin configuration is identical.
Fig.2 Pin configuration.
2002 Aug 21
6
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Philips Semiconductors Preliminary specification
10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VCCA VCCD VCCO ∆VCC PARAMETER analog supply voltage digital supply voltage digital outputs supply voltage supply voltage difference between VCCA and VCCD between VCCA and VCCO between VCCD and VCCO Vi Io Tstg Tamb Tj Note 1. All supplies are connected together. HANDLING input voltage data output current storage temperature ambient temperature junction temperature referenced to AGND −0.5 −0.5 −0.5 −0.3 − −55 −20 − +0.5 +1.2 +1.2 +6.5 ±10 CONDITIONS note 1 note 1 note 1 MIN. −0.3 −0.3 −0.3
TDA9952
MAX. +4.5 +4.5 +4.5 V V V V V V V
UNIT
mA °C °C °C
+150 +75 150
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 76 UNIT K/W
2002 Aug 21
7
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Philips Semiconductors Preliminary specification
10-bit, 3.0 V, 25 Msps analog-to-digital interface for CCD cameras
CHARACTERISTICS VCCA = VCCD = 3.0 V; VCCO = 2.5 V; fpix = 25 MHz; Tamb = −20 to +75 °C; unless otherwise specified. SYMBOL Supplies VCCA VCCD VCCO ICCA ICCD ICCO analog supply voltage digital supply voltage digital outputs supply voltage analog supply current digital supply current digital outputs supply current total power consumption CL = 10 pF on all data outputs; input ramp of 800 µs duration VCCA = VCCD = 3 V; VCCO = 2.5 V VCCA = VCCD = 2.7 V; VCCO = 2.2 V standby mode Digital inputs PINS SHP, SHD AND CLK (REFERENCED TO DGND) VIL VIH Ii Ci VIL VIH Ii Clamps GLOBAL CHARACTERISTICS OF THE CLAMP LOOPS tW(clamp) clamp active pulse width in PGA code = 383 for number of pixels maximum 6 LSB error for a CPCDS capacitance of 1 µF; clamp code = 32 CDS input clamp transconductance 15 − − LOW-level input voltage HIGH-level input voltage input current input capacitance 0 ≤ Vi ≤ 5.5 V 0 2.0 −3 − 0 2.0 0 ≤ Vi ≤ 5.5 V −2 − − − − − − − all clamps active 2.7 2.7 2.2 − − − 3.0 3.0 2.5 43 2.0 0.5 PARAMETER CONDITIONS MIN. TYP.
TDA9952
MAX.
UNIT
3.6 3.6 3.6 − − −
V V V mA mA mA
Ptot
− − −
135 115 4.5
− − −
mW mW mW
0.8 5.5 +3 2
V V µA pF
PINS CLPDM, CLPOB, SEN, SCLK, SDATA STBY, OE, BLK AND VSYNC LOW-level input voltage HIGH-level input voltage input current 0.8 5.5 +2 V V µA
pixels
INPUT CLAMP (DRIVEN BY CLPDM) gm(CDS) − 15 − mS
2002 Aug 21
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