Analog-to-Digital Converter (ADC) direct/ultra high IF sampling

www.DataSheet4U.com TDA9910 12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC) direct/ultra high IF sampling Rev. 02 — 9 December 2004 Objective data sheet 1. General description The TDA9910 is a 12-bit Analog-to-Digital Converter (ADC) optimized for direct IF sampling, and supporting the most demanding use conditions in ultra high IF radio transceivers for cellular infrastructure and other applications such as wireless access system, optical networking and fixed telecommunication. Thanks to its broadband input capabilities, the TDA9910 is ideal for single and multiple carriers data conversion. Operating at a maximum sampling rate of 80 Msample/s, analog input signals are converted into 12-bit binary coded digital words. All static digital inputs are CMOS compatible. All output signals are LVCMOS compatible. The TDA9910 offers the most possible flexible acquisition control system thanks to its programmable Complete Conversion Signal (CCS) that allows to adjust the delay of the acquisition clock. Thanks to its internal front-end buffer, the TDA9910 offers the lowest input capacitance (< 1 pF) and therefore the highest flexibility in front-end aliasing filter strategy. Released in HTQFP48, it keeps the industry's smallest ADC of its category. 2. Features s s s s s s s s s s s s s s s 12-bit resolution Direct IF sampling up to 370 MHz 90 dB SFDR; 71 dB SNR (fi = 225 MHz; B = 5 MHz) 72 dB SFDR; 66 dB SNR (fi = 175 MHz; B = Nyquist) High-speed sampling rate up to 80 Msample/s Programmable acquisition output clock (complete conversion signal) Internal front-end buffer (input capacitance below 1 pF) Full-scale controllable from 1.5 V to 2 V (p-p); continuous scale Single 5 V power supply 3.3 V LVCMOS compatible digital outputs Binary or two’s-complement LVCMOS outputs CMOS compatible static digital inputs Only 2 clock cycles latency Industrial temperature range from −40 °C to +85 °C HTQFP48 package. www.DataSheet4U.com Philips Semiconductors TDA9910 12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC) 3. Applications s s s s s 2.5G and 3G cellular base infrastructure radio transceivers Wireless access systems Fixed telecommunication Optical networking WLAN infrastructure. 4. Ordering information Table 1: Ordering information Package Name TDA9910HW/6 TDA9910HW/8 HTQFP48 Description plastic thermal enhanced thin quad flat package; 48 leads; body 7 × 7 × 1 mm; exposed die pad Version SOT545-2 Sampling frequency (Msample/s) 60 80 Type number 5. Block diagram CLK CLKN TDA9910 CLOCK DRIVER 2 DEL0 to DEL1 CCS 12 LATCH 12 D0 to D11 OTC front-end buffer IN INN TRACK AND HOLD RESISTOR LADDERS ADC CORE U/I FSIN VCCO LATCH IR FSOUT VREF REFERENCE CMADC REFERENCE OUTPUTS ENABLE 001aaa511 CMADC DEC CE_N Fig 1. Block diagram. 9397 750 14418 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Objective data sheet Rev. 02 — 9 December 2004 2 of 21 www.DataSheet4U.com Philips Semiconductors TDA9910 12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC) 6. Pinning information 6.1 Pinning 41 VCCD1(5V0) 47 VCCA1(5V0) 45 VCCA1(5V0) 44 VCCA2(5V0) 42 DGND1 38 DGND1 48 AGND1 46 AGND1 43 AGND2 39 CLKN n.c. AGND1 IN CMADC INN AGND1 DEC n.c. FSOUT 37 CCS 36 D0 35 D1 34 D2 33 D3 32 D4 31 D5 30 D6 29 D7 28 D8 27 D9 26 D10 25 D11 IR 24 001aaa512 1 2 3 4 5 6 7 8 9 DGND TDA9910HW FSIN 10 n.c. 11 n.c. 12 n.c. 13 DEL1 14 DEL0 15 VCCD2(5V0) 16 DGND2 17 CE_N 18 OTC 19 OGND 20 VCCO(3V3) 21 40 CLK OGND 22 Fig 2. Pin configuration. 6.2 Pin description Table 2: Symbol n.c. AGND1 IN CMADC INN AGND1 DEC n.c. FSOUT FSIN n.c. n.c. n.c. DEL1 9397 750 14418 Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Type [1] G I O I G I/O O I I Description not connected analog ground 1 analog input voltage regulator common mode ADC output complementary analog input voltage analog ground 1 decoupling node not connected full-scale reference voltage output full-scale reference voltage input not connected not connected not connected complete conversion signal delay input 1 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Objective data sheet Rev. 02 — 9 December 2004 VCCO(3V3) 23 3 of 21 www.DataSheet4U.com Philips Semiconductors TDA9910 12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC) Pin description …continued Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Type [1] I P G I I G P G P O O O O O O O O O O O O O O G I I P G G P P G P G Description complete conversion signal delay input 0 digital supply voltage 2 (5.0 V) digital ground 2 chip enable input (CMOS level; active LOW) control input for two’s complement output (active HIGH) data output ground data output supply voltage (3.3 V) data output ground data output supply voltage (3.3 V) in-range output data output bit 11 (MSB) data output bit 10 data output bit 9 data output bit 8 data output bit 7 data output bit 6 data output bit 5 data output bit 4 data output bit 3 data output bit 2 data output bit 1 data output bit 0 (LSB) complete conversion signal output digital ground 1 complementary clock input clock input digital supply voltage 1 (5.0 V) digital ground 1 analog ground 2 analog supply voltage 2 (5.0 V) analog supply voltage 1 (5.0 V) analog ground 1 analog supply voltage 1 (5.0 V) analog ground 1 digital ground Table 2: Symbol DEL0 VCCD2(5V0) DGND2 CE_N OTC OGND VCCO(3V3) OGND VCCO(3V3) IR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 CCS DGND1 CLKN CLK VCCD1(5V0) DGND1 AGND2 VCCA2(5V0) VCCA1(5V0) AGND1 VCCA1(5V0) AGND1 DGND exposed G die pad [1] P: power supply; G: ground; I: input; O: output. 9397 750 14418 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Objective data sheet Rev. 02 — 9 December 2004 4 of 21 www.DataSheet4U.com Philips Semiconductors TDA9910 12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC) 7. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCCA VCCD VCCO ∆VCC Parameter analog supply voltage digital supply voltage output supply voltage supply voltage difference VCCA − VCCD VCCD − VCCO VCCA − VCCO VIN, VINN input voltage referenced to AGND referenced to DGND −1.0 −1.0 −1.0 0 0 −55 −40 +1.0 +4.0 +4.0 VCCA + 1 VCCD + 1 +150 +85 150 V V V V V mA °C °C °C Conditions [1] [1] [2] Min −0.5 −0.5 −0.5 Max +7.0 +7.0 +5.0 Unit V V V VCLK, VCLKN input voltage for differential clock drive IO Tstg Tamb Tj [1] [2] output current storage temperature ambient temperature junction temperature The supply voltages VCCA and VCCD may have any value between −0.5 V and +7.0 V provided that the supply voltage differences ∆VCC are respected. The supply voltage VCCO may have any value between −0.5 V and +5.0 V provided that the supply voltage differences ∆VCC are respected. 8. Thermal characteristics Table 4: Symbol Rth(j-a) Rth(j-c) [1] Thermal characteristics Parameter thermal resistance from junction to ambient thermal resistance from junction to case Conditions [1] Typ 36.2 14.3 Unit K/W K/W [1] In compliance with JEDEC test board, in free air. 9. Characteristics Table 5: Characteristics VCCA = 4.75 V to 5.25 V; VCCD = 4.75 V to 5.25 V; VCCO = 2.7 V to 3.6 V; AGND and DGND shorted together; Tamb = −40 °C to +85 °C; VIN(p-p) − VINN(p-p) = 2.0 V − 0.5 dB; VFSIN = VCCA1 − 1.77 V; Vi(CM) = VCCA1 − 1.85 V; typical values measured at VCCA = VCCD = 5 V, VCCO = 3.3 V, Tamb = 25 °C and CL = 10 pF; unless otherwise specified. Symbol Parameter Supplies VCCA VCCD VCCO 9397 750 14418 Conditions Test [1] Min 4.75 4.75 2.7 Typ 5.0 5.0 3.3 Max 5.25 5.25 3.6 Unit V V V 5 of 21 analog supply voltage digital supply voltage output supply voltage © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Objective data sheet Rev. 02 — 9 December 2004 www.DataSheet4U.com Philips Semiconductors TDA9910 12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC) Table 5: Characteristics …continued VCCA = 4.75 V to 5.25 V; VCCD = 4.75 V to 5.25 V; VCCO = 2.7 V to 3.6 V; AGND and DGND shorted together; Tamb = −40 °C to +85 °C; VIN(p-p) − VINN(p-p) = 2.0 V − 0.5 dB; VFSIN = VCCA1 − 1.77 V; Vi(CM) = VCCA1 − 1.85 V; typical values measured at VCCA = VCCD = 5 V, VCCO = 3.3 V, Tamb = 25 °C and CL = 10 pF; unless otherwise specified. Symbol Parameter ICCA ICCD ICCO Ptot analog supply current digital supply current output supply current total power dissipation fCLK = 80 Msample/s; fi = 175 MHz fCLK = 80 Msample/s; DC input referenced to DGND; VCCD = 5 V PECL mode TTL mode VIH HIGH-level input voltage referenced to DGND; VCCD = 5 V PECL mode TTL mode IIL LOW-level input current VCLK or VCLKN = 3.52 V VCLK or VCLKN = 2.00 V IIH HIGH-level input current VCLK or VCLKN = 3.83 V VCLK or VCLKN = 0.80 V ∆VCLK differential AC input voltage for switching (VCLK − VCLKN) input resistance input capacitance LOW-level input current HIGH-level input current input resistance AC mode; DC voltage level is 2.5 V fCLK = 80 Msample/s fCLK = 80 Msample/s VFSIN = VCCA − 1.75 V VFSIN = VCCA − 1.75 V fi = 21.4 MHz fi = 93 MHz fi = 175 MHz Ci input capacitance fi = 21.4 MHz fi = 93 MHz fi = 175 MHz Vi(CM) common mode input voltage LOW-level input voltage HIGH-level input voltage VIN = VINN; output code = 2047 D D D D D D D 3.83 2.0 20 1 1.5 4.12 VCCD 30 2 V V µA nA µA nA V 3.19 DGND 3.52 0.8 V V Conditions Test [1] Min Typ 122 52 29 870 Max Unit mA mA mA mW Clock inputs: pins CLK and CLKN [2] VIL LOW-level input voltage Ri Ci IIL IIH Ri 6.3 6.3 6.3 VCCA − 2 6.3 1.1 5 5 - 700 700 700 kΩ pF µA µA MΩ MΩ MΩ fF fF fF V Analog inputs: pins IN and INN VCCA − 1.85 VCCA − 1.6 Digital inputs: pins OTC and CE_N VIL VIH 9397 750 14418 DGND - 0.3 × VCCD VCCD V V 6 of 21 0.7 × VCCD Rev. 02 — 9 December 2004 © Koninklij