Multiple output voltage regulators

INTEGRATED CIRCUITS DATA SHEET TDA3601Q TDA3601AQ Multiple output voltage regulators Product specification Supersedes data of September 1994 File under Integrated Circuits, IC01 1995 Dec 13 Philips Semiconductors Product specification Multiple output voltage regulators FEATURES • Six fixed voltage regulators • Three microprocessor-controlled regulators • Two VP-state controlled regulators • One fixed voltage regulator (can operate during load dump or thermal shutdown) • VP1 supply pin (low current pin) • VP2 supply pin (high current pin) • RESET output (TDA3601Q) or RESET output (TDA3601AQ) • Internally fixed timer of 100 µs • Externally fixed delay timer • High ripple rejection • Flexible leads. QUICK REFERENCE DATA SYMBOL Entire device VP1 VP2 supply voltage range supply voltage range operating load dump; notes 1 and 2 operating non-operating load dump; note 1 I1tot Tc VR1 VR2 VR3 VR4 VR5 VR6 Notes 1. Load dump, during 50 ms, tr > 2.5 ms. 2. Regulator 1 operating, 0.5 mA ≤ IR1 ≤ 20 mA. 3. VP1 = 13.2 V; VP2 = R4-sel = R5-sel = 0; IR1 = 0. total quiescent current, VP1 crystal temperature 0.5 mA ≤ IR1 ≤ 20 mA 5 mA ≤ IR2 ≤ 200 mA 5 mA ≤ IR3 ≤ 150 mA 5 mA ≤ IR4 ≤ 150 mA 5 mA ≤ IR5 ≤ 200 mA 5 mA ≤ IR6 ≤ 200 mA VP2 = 0; note 3 11 − 11 − − − − PARAMETER CONDITIONS MIN. PROTECTION TDA3601Q TDA3601AQ • Current limit protection for regulator 1 • Foldback current limit protection (regulators 2 to 6) • Load dump protection • Thermal protection • Regulator outputs DC short-circuit-safe to ground, VP and other regulator outputs • Capable of handling high energy on any of the output pins • Reverse polarity safe. TYP. MAX. UNIT 13.2 − 13.2 − − 1 − 18 50 18 30 50 1.4 150 V V V V V mA °C Voltage regulators output voltage regulator 1 output voltage regulator 2 output voltage regulator 3 output voltage regulator 4 output voltage regulator 5 output voltage regulator 6 4.75 1.9 4.75 9 9 9.3 5 2.1 5 9.5 9.5 9.75 5.25 2.3 5.25 10 10 10.2 V V V V V V 1995 Dec 13 2 handbook, full pagewidth 1995 Dec 13 VP1 VP2 5 11 VP2 SENSE OVER VOLTAGE AND THERMAL SHUTDOWN REGULATOR 1 5V 4 regulator 1 output OUT OF REGULATION AND REGULATOR 3 5V 9 regulator 3 output REGULATOR 2 2.1 V 10 regulator 2 output POWER ON RESET - output 13A INVERT BLOCK DIAGRAM Philips Semiconductors Multiple output voltage regulators TDA3601Q TDA3601AQ RESET - output 13 OR GATE 3 reset timing capacitor regulator 5 select regulator 4 select 1 ONE SHOT 40 ms 2 3 REGULATOR 4 9.5 V 6 regulator 4 output REGULATOR 5 9.5 V 7 regulator 5 output ONE SHOT 100 µs LOGIC SWITCH REGULATOR 6 9.75 V 8 regulator 6 output 12 MCD341 TDA3601Q TDA3601AQ Product specification ground Fig.1 Block diagram. Philips Semiconductors Product specification Multiple output voltage regulators ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA3601Q TDA3601AQ DBS13P DESCRIPTION TDA3601Q TDA3601AQ VERSION SOT141-6 plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) GENERAL DESCRIPTION The circuit contains five fixed voltage regulators with foldback current protection and one fixed voltage regulator (REGULATOR 1) that also operates during a load dump. In addition, a RESET function (TDA3601Q) or RESET function (TDA3601AQ), timer functions and a logic multiplexer are implemented. PINNING SYMBOL CRESET R5-sel R4-sel REG1 VP1 REG4 REG5 REG6 REG3 REG2 VP2 GND RES RES PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 13A DESCRIPTION reset timing capacitor regulator 5 select regulator 4 select regulator 1 output (5 V) supply voltage regulator 4 output (9.5 V) regulator 5 output (9.5 V) regulator 6 output (9.75 V) regulator 3 output (5 V) regulator 2 output (2.4 V) supply voltage ground RESET output (TDA3601Q) RESET output (TDA3601AQ) Fig.2 Pin configuration. handbook, halfpage C RESET R5 - sel R4 - sel REG1 VP1 REG4 REG5 REG6 REG3 1 2 3 4 5 6 7 8 9 TDA3601Q TDA3601AQ REG2 10 VP2 11 GND 12 RES or RES 13 MCD340 - 1 1995 Dec 13 4 Philips Semiconductors Product specification Multiple output voltage regulators FUNCTIONAL DESCRIPTION The TDA3601Q is a multiple output voltage regulator with six fixed voltage regulators. Three, logical switch controlled, voltage regulators (numbers 4 to 6) are available, and one non-switchable voltage regulator (number 1). In addition, there are two further regulators (numbers 2 and 3), which are controlled by supply voltages VP1 and VP2 (Schmitt trigger). Regulator 1 is not affected by load dump or thermal shutdown. Regulators 2 to 6 are supplied by VP2; they can therefore be switched of by an ignition switch, for example. An internal bandgap voltage reference, which provides a reference voltage for each independent regulator, is supplied by VP1. This supply voltage VP1 also supplies regulator 1. A VP2 sense circuit outputs a logical high when the VP2 voltage rises through Vthr, which remains high until the VP2 voltage falls through Vthf. The supply voltage VP1 is sensed by an out-of-regulation Schmitt trigger. TDA3601Q TDA3601AQ When this voltage drops below 5.95 V typical, the reset output is disabled, to prevent a microprocessor being disturbed by a too-low supply voltage. An out-of-regulation condition is indicated by a logical low and an in-regulation condition indicated by a logical high. The ‘Power On’ switch low will disable regulator 2 and 3 outputs. In addition, the logic switch will be disabled, so that regulators 4 to 6 are switched off. When both VP2-sense and out-of-regulation are high, the ‘Power On’ will be high, so that the logic multiplexer and regulators 2 and 3 are enabled. Regulators 4 to 6 can now be selected by the multiplexer. Re-triggerable one-shot circuits produce a RESET (open collector output) when VP1 is available (40 ms delay signal), or when both VP1 and VP2 are available (100 µs pulse). RESET will be held in a constant high state when the supply voltage VP1 is less than 5.5 V (5.95 V typical). The TDA3601 has a RESET output, but the TDA3601A has an inverted RESET output (RESET). LIMITING VALUES In accordance with the Absolute maximum System (IEC 134). SYMBOL VP1, VP2 PARAMETER supply voltage operating non-operating CONDITIONS − − MIN. MAX. 18 30 50 15 150 150 6 UNIT V V V W °C °C V load dump protected; during 50 ms; − tr > 2.5 ms; note 1 Ptot Tstg Tvj Vpr Note 1. Regulator 1 operating, 0.5 mA ≤ IR1 ≤ 20 mA. THERMAL CHARACTERISTICS SYMBOL Rth j-c Rth j-amb PARAMETER thermal resistance from junction to case thermal resistance from junction to ambient in free air total power dissipation storage temperature range virtual junction temperature reverse polarity Tcase < 30 °C non-operating operating non-operating − −55 −40 − VALUE 8 40 UNIT K/W K/W QUALITY SPECIFICATION Quality according to UZW-BO/FQ-0601. 1995 Dec 13 5 Philips Semiconductors Product specification Multiple output voltage regulators CHARACTERISTICS VP1 = VP2 = 13.2 V, Tamb = 25 °C, Cout = 10 µF; unless otherwise specified (see Fig.5). SYMBOL Supply VP1 VP1 VP2 VP2 IP1 supply voltage range supply voltage range supply voltage range supply voltage range quiescent current operating load dump; notes 1and 2 operating load dump; note 1 VP2 = 0; note 3 11 − 11 − − PARAMETER CONDITIONS MIN. TDA3601Q TDA3601AQ TYP. MAX. UNIT 13.2 − 13.2 − 1.1 18 50 18 50 1.4 V V V V mA Schmitt triggers VP2-SENSE THRESHOLD Vthr Vthf Vhy Vthr Vthf Vhy trst1 trst Vrl Icr tr tf VCAP Rsp Regulators SELECTOR CONTROL INPUTS R4-SEL AND R5-SEL Vsl Vsh Ihs Ils input low voltage input high voltage input high current input low current VRXsel > 2 V VRXsel < 0.8 V −0.5 2 − −1 − − − − 0.8 − 1 − V V µA µA rising threshold voltage falling threshold voltage hysteresis 7.6 6.2 1.35 8 6.5 1.5 8.4 6.8 1.65 V V V OUT-OF-REGULATION THRESHOLD rising threshold voltage falling threshold voltage hysteresis 6.8 5.5 1.2 7.35 5.95 1.4 7.9 6.4 1.6 V V V Reset circuits (for timing, see Fig.3) reset delay time reset hold time reset low delay current (pin 1 to Crst) reset rise time reset fall time voltage pin 1 spike-on reset note 4 note 4 Crst = 0 on-state; note 5 Isync = 1 mA Crst = 100 nF 20 50 − − − − 5.5 − 40 100 0.15 −5 − − 6.0 0 100 150 0.8 − 1 1 − 100 ms µs V µA µs µs V mV 1995 Dec 13 6 Philips Semiconductors Product specification Multiple output voltage regulators TDA3601Q TDA3601AQ CONDITIONS MIN. TYP. MAX. UNIT SYMBOL PARAMETER REGULATOR 1 (IR1 = 1 MA UNLESS OTHERWISE SPECIFIED) VR1 VR1L ∆VR1 ∆VRL1 RR1 VRd1 IRm1 ∆V/∆T VR2 ∆VR2 ∆VRL2 RR2 IRm2 IRsc2 ∆V/∆T VR3 ∆VR3 ∆VRL3 RR3 IRm3 IRsc3 ∆V/∆T VR4 ∆VR4 ∆VRL4 RR4 VRd4 IRm4 IRsc4 ∆V/∆T output voltage output voltage line regulation load regulation ripple rejection drop-out voltage current limit thermal drift −40 ≤ T ≤ 80 °C 5 mA ≤ IR2 ≤ 200 mA 7 V ≤ VP ≤ 18 V line regulation load regulation ripple rejection current limit short-circuit current thermal drift 7 V ≤ VP ≤ 18 V 5 mA ≤ IR2 ≤ 200 mA fo = 120 Hz; VP1 = VP2; note 6 VR2 > 1.75 V; note 7 RL ≤ 0.5 Ω; note 7 −40 ≤ T ≤ 80 °C 5 mA ≤ IR3 ≤ 150 mA 7 V ≤ VP ≤ 18 V line regulation load regulation ripple rejection current limit short-circuit current thermal drift 7 V ≤ VP ≤ 18 V 5 mA ≤ IR3 ≤ 150 mA fo = 120 Hz; VP1 = VP2; note 6 VR3 > 4.5 V; note 7 RL ≤ 0.5 Ω; note 7 −40 ≤ T ≤ 80 °C 5 mA ≤ IR4 ≤ 150 mA 11 V ≤ VP ≤ 18 V line regulation load regulation ripple rejection drop-out voltage current limit short-circuit current thermal drift 11 V ≤ VP ≤ 18 V 5 mA ≤ IR4 ≤ 150 mA fo = 120 Hz; VP1 = VP2; note 6 IR4 = 150 mA VR4 > 8.5 V; note 7 RL ≤ 0.5 Ω; note 7 −40 ≤ T ≤ 80 °C 0.5 mA ≤ IR1 ≤ 20 mA 6.25 V ≤ VP1 ≤ 18 V 18 V ≤ VP ≤ 50 V 6.25 V ≤ VP ≤ 18 V 0.5 mA ≤ IR1 ≤ 20 mA fo = 120 Hz; VP1 = VP2; note 6 IR1 = 20 mA 4.75 4.75 4.75 − − 60 − 30 − 1.9 1.9 − − 60 250 − −