TV VERTICAL DEFLECTION

TDA1170S TV VERTICAL DEFLECTION . . . . . SYNCHRONIZATION CIRCUIT OSCILLATOR AND RAMP GENERATOR HIGH POWER GAIN AMPLIFIER FLYBACK GENERATOR VOLTAGE REGULATOR FINDIP (Plastic Package) ORDER CODE : TDA1170S DESCRIPTION The TDA1170S is a monolithic integrated circuit in a 12-lead quad in-line plastic package. It is intended for use in black and white and colour TV receivers. PIN CONNECTIONS RAMP OUTPUT SUPPLY VOLTAGE FLYBACK GROUND POWER AMPLIFLIER OUTPUT POWER AMPLIFLIER SUPPLY VOLTAGE REGULATED VOLTAGE 1 2 3 12 11 10 RAMP GENERATOR COMPENSATION AMP. INPUT GROUND 4 5 6 9 8 7 OSCILLATOR SYNC. INPUT HEIGHT ADJUSTMENT 1170S-01.EPS December 1992 1/9 TDA1170S BLOCK DIAGRAM + VS C4 DA FREQ 6 2 3 5 RH C9 P1 TDA1170S 9 OSCILLATOR VOLTAGE REGULATOR FLYBACK GENERATOR POWER AMPLIFLIER 4 C1 RG C8 SYNC 8 YOKE SYNC CIRCUIT RAMP GENERATOR BUFFER STAGE PREAMPLIFLIER 11 C5 C7 RE RD 7 TABS C2 P2 RA 12 1 LINEARITY 10 P3 C3 RB RC C6 1170S-02.EPS HEIGHT RF 2/9 SCHEMATIC DIAGRAM TDA1170S 5 2 D8 Q16 Q10 Q15 Q1 Q25 D7 Q26 3 Q36 R7 D4 R3 Q11 R8 Q28 R10 Q29 Q35 Z1 Q21 Q22 Q6 Q4 A Q20 Q12 R4 Q13 Q17 D Q23 R9 Q5 D5 D6 4 Q3 Q33 Q30 Q31 Q18 Q27 Q37 Q34 C B Q14 Q9 Q7 R5 Q19 E R6 D3 TABS Q2 Q8 Q24 Q32 R1 R2 D1 6 9 8 7 12 1 10 11 TDA1170S 3/9 1170S-03.EPS TDA1170S ABSOLUTE MAXIMUM RATINGS Symbol VS V4 , V5 V10 Io Io Io I3 I3 I8 Ptot Tstg, Tj Parameter Supply Voltage at Pin 2 Flyback Peak Voltage Power Amplifier Input Voltage Output Peak Current (non repetitive) at t = 2msec Output Peak Current at f = 50Hz t ≤ 10µsec Output Peak Current at f = 50Hz t > 10µsec Pin 3 DC Current at V4 2 Pin 3 Peak to Peak Flyback Current for f = 50Hz, tfly ≤ 1.5msec Pin 8 Current Power Dissipation : at Ttab = 90 °C at Tamb = 80 ° C Storage and Junction Temperature Value 35 60 + 10 – 0.5 2 2.5 1.5 100 1.8 ± 20 5 1 – 40, + 150 Unit V V V V A A A mA A mA W W °C THERMAL DATA Max Max 1170S-02.TBL 1170S-03.TBL Symbol Rth j–tab R th j–amb Parameter Thermal Resistance Junction–tab Thermal Resistance Junction-ambient Value 12 70 Unit °C/W °C/W (°) Obtained with tabs soldered to printed circuit with minimized copper area. ELECTRICAL CHARACTERISTICS (refer to the test circuits, VS = 35V, Tamb = 25°C, unless otherwise specified) DC CHARACTERISTICS Symbol I2 I5 – I9 – I10 – I12 – I12 ∆I12 I12 Vs V1 V3 V4 Parameter Pin 2 Quiescent Current Pin 5 Quiescent Current Oscillator Bias Current Amplifier Input Bias Current Ramp Generator Bias Current Ramp Generator Current Ramp Generator Non-linearity Supply Voltage Range Pin 1 Saturation Voltage to Ground Pin 3 Saturation Voltage to Ground Quiescent Output Voltage Test Conditions I3 = 0 I4 = 0 V9 = 1V V10 = 1V V12 = 0 I7 = 20 µA, V12 = 0 ∆V12 = 0 to 12V, I7 = 20µA 10 I1 = 1 mA I3 = 10 mA VS = 10V R1 = 10kΩ , R2 = 10kΩ VS = 35V R1 = 30kΩ, R2 = 10kΩ – I4 = 0.1A – I4 = 0.8A I4 = 0.1A I4 = 0.8A I7 = 20µA ∆VS = 10 to 35V V8 ≤ 0.4V 2.07 1 1 1.7 4.4 8.8 0.9 1.9 1.4 2.8 6.5 6.6 1 2.2 2.3 Min. Typ. 7 8 0.1 0.1 0.02 20 0.2 Max. 14 15 1 1 0.3 24 1 35 1.4 2.6 4.75 9.45 1.2 2.3 2.1 3.2 6.9 7 Unit mA mA µA µA µA µA % V V V V V V V V V V V mV/V V MΩ Fig. 1b 1b 1a 1b 1a 1b 1b – – 1a 1a 1a 1c 1c 1d 1d 1b 1b 1b – 1a 19 4.1 8.3 V4L V4H V6 V7 ∆V6 ∆V7 , ∆VS ∆VS V10 R8 4/9 Output Saturation Voltage to Ground Output Saturation Voltage to Supply Regulated Voltage at Pin 6 Regulated Voltage at Pin 7 Regulated Voltage Drift with Supply Voltage Amplifier Input Reference Voltage Pin 8 Input Resistance 6.1 6.2 1170S-01.TBL TDA1170S Figure 1 : DC Test Circuit Figure 1a Figure 1b I2 V3 I3 + Vs + Vs I5 2 3 2 5 5 8 TDA1170S 9 I8 7 1kΩ 12 TABS 10 4 9 TDA1170S TABS 6 12 7 10 R1 - I9 1V 8V - I12 R2 V4 V6 - I12 V7 - I10 1V 100kΩ 1170S-04.EPS 1V 1170S-05.EPS Figure 1c + Vs Figure 1d + Vs 2 5 I4 2 5 V4H 9 TDA1170S TABS 10 4 9 TDA1170S TABS 10 4 4V V4L 1170S-06.EPS 1V I4 1170S-07.EPS 5/9 TDA1170S ELECTRICAL CHARACTERISTICS (refer to the test circuit, VS = 25V ; f = 50Hz ; Tamb = 25oC, unless otherwise specified) AC CHARACTERISTICS Symbol Is I8 V4 V9 tfly fo ∆f ∆f ∆VS  ∆f   ∆T   tab  Parameter Supply Current Sync. Input Current (positive or negative) Flyback Voltage Peak to Peak Oscillator Sawtooth Voltage Flyback Time Free Running Frequency Synchronization Range Frequency Drift with Supply Voltage Frequency Drift with Tab Temperature Iy = 1App (P1 + R1) = 300kΩ, C2 = 0.1 µF (P1 + R1) = 260kΩ, C2 = 0.1 µF I8 = 0.5mA VS = 10 to 35V Ttab = 40 to 120°C 14 0.005 0.01 Iy = 1App Test Conditions Iy = 1App 500 51 2.4 0.7 42.2 48.5 Min. Typ. 140 Max. Unit mA µA V V ms Hz Hz Hz Hz/V Hz/°C 1170S-04.TBL 1170S-08.EPS Figure 2 : AC Test Circuit 6/9 TDA1170S Figure 3 : Typical Application Circuit for Large Screen B/W TV SET (RY = 10Ω, LY = 20mH, IY = 1APP) VS = 22V D1 1N4001 C9 470µF 25V TABS C1 0.1µF C3 100µF 25V 3 5 2 R11 3.3Ω 4 C10 0.1µF SYNC. INPUT C11 0.1µF 8 R13 4.7kΩ 9 T D A 1 1 7 0 S 6 7 12 R4 220kΩ 11 C12 1.5nF 10 R5** 47kΩ 1 P3 47kΩ C8 33pF R9** 27kΩ C7 1000µF/16V R8** 27kΩ C6 22µF/16V P1 100kΩ R1 Linearity R6 39kΩ R7** 5.6k Ω R14 210Ω YOKE Ry = 10Ω Ly = 20mH Hold 150kΩ C2 0.15 µF P2 100kΩ Height R2 180kΩ C4 0.1µF R3* 330kΩ C5 0.1µF * ** Tolerance 5% Tolerance 2% TYPICAL PERFORMANCE Symbol VS Is tfly Ptot Iy Operating Supply Voltage Supply Current Flyback Time Power Dissipation Maximum Scanning Current (peak to peak) Parameter Value 22 145 0.7 2.3 1.2 Unit V mA W A 1170S-05.TBL ms For safe working up to Tamb = 60°C a heatsink of Rth = 14°C/W is required. 7/9 1170S-09.EPS R10* 1Ω TDA1170S MOUNTING INSTRUCTION The junction to ambient thermal resistance of the TDA 1170S can be reduced by soldering the tabs to a suitable copper area of the printed circuit board (fig. 4) or to an external heatsink (fig. 5). Figure 4 : Example of P.C Board Copper Are is Used as Heatsink The diagram of fig. 6 shows the maximum dissipable power Ptot and the Rth j-amb as a function of the side ”s” of two equal square copper areas having a thickness of 35 µ (1.4 mil). Figure 5 : Example with External Heatsink 1170S-10.EPS Figure 6 : Maximum Power Dissipation and Junction-Ambient Thermal Resistance versus ”S” Figure 7 : Maximum Allowable Power Dissipation versus Ambient Temperature 1170S-12.EPS 8/9 1170S-13.EPS 1170S-11.EPS TDA1170S PACKAGE MECHANICAL DATA : 12 PINS - PLASTIC FINDIP D G e4 A a1 I b c c1 e5 e6 e3 E2 E e E1 K D 12 7 1 6 F L M b1 Dimensions A a1 b b1 c c1 D E E1 E2 e e3 e4 e5 e6 F G I K L M Min. 3.8 1.5 0.55 0.3 Millimeters Typ. Max. 4.05 1.75 0.6 0.35 Min. 0.150 0.059 0.022 0.012 Inches Typ. Max. 0.159 0.069 0.024 0.014 1.32 0.94 19.2 16.8 4.86 10.11 2.29 17.43 7.27 12.35 6.3 7.8 6.1 2.5 2.5 17.2 19.9 17.6 5.56 10.81 2.79 18.13 7.97 13.05 7.1 8.6 6.5 2.9 3.1 0.756 0.661 0.191 0.398 0.090 0.686 0.286 0.486 0.248 0.307 0.240 0.098 0.098 0.052 0.037 0.677 0.783 0.693 0.219 0.426 0.110 0.714 0.314 0.514 0.280 0.339 0.256 0.114 2.54 17.78 7.62 7.62 12.7 9.8 0.100 0.700 0.300 0.300 0.500 0.386 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without noti ce. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system confo rms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 9/9 FINDIP.TBL PM-FDIP.EPS