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www.DataSheet4U.com MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MMFT3055EL/D Medium Power Field Effect Transistor N–Channel Enhancement Mode Silicon Gate TMOS E–FETt SOT–223 for Surface Mount This advanced E–FET is a TMOS power MOSFET designed to withstand high energy in the avalanche and commutation modes. This device is also designed with a low threshold voltage so it is fully enhanced with 5 Volts. This new energy efficient device also offers a drain–to–source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. The device is housed in the SOT–223 package which is designed for medium power surface mount applications. • Silicon Gate for Fast Switching Speeds • Low Drive Requirement to Interface Power Loads to Logic Level ICs, VGS(th) = 2 Volts Max • Low RDS(on) — 0.18 Ω max • The SOT–223 Package can be Soldered Using Wave or Reflow. The Formed Leads Absorb Thermal Stress During Soldering, Eliminating the Possibility of Damage to the Die • Available in 12 mm Tape and Reel Use MMFT3055ELT1 to order the 7 inch/1000 unit reel. Use MMFT3055ELT3 to order the 13 inch/4000 unit reel. MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Rating Drain–to–Source Voltage Gate–to–Source Voltage — Continuous Drain Current — Continuous Drain Current — Pulsed Total Power Dissipation @ TA = 25°C Derate above 25°C Operating and Storage Temperature Range Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C (VDD = 25 V, VGS = 5 V, Peak IL= 1.5 A, L = 0.2 mH, RG = 25 Ω) Symbol VDS VGS ID IDM PD(1) TJ, Tstg EAS 1 G S 3 MMFT3055EL Motorola Preferred Device MEDIUM POWER LOGIC LEVEL TMOS FET 1.5 AMP 60 VOLTS RDS(on) = 0.18 OHM ® 2,4 D 1 4 2 3 CASE 318E–04, STYLE 3 TO–261AA Value 60 ± 15 1.5 6 0.8 6.4 – 65 to 150 178 Unit Vdc Adc Watts mW/°C °C mJ DEVICE MARKING 3055L THERMAL CHARACTERISTICS Thermal Resistance — Junction–to–Ambient (surface mounted) Maximum Temperature for Soldering Purposes, Time in Solder Bath RθJA TL 156 260 5 °C/W °C Sec (1) Power rating when mounted on FR–4 glass epoxy printed circuit board using recommended footprint. TMOS is a registered trademark of Motorola, Inc. E–FET is a trademark of Motorola, Inc. Thermal Clad is a trademark of the Bergquist Company Preferred devices are Motorola recommended choices for future use and best overall value. REV 3 ©Motorola TMOS Power MOSFET Transistor Device Data Motorola, Inc. 1995 1 MMFT3055EL www.DataSheet4U.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage, (VGS = 0, ID = 250 µA) Zero Gate Voltage Drain Current, (VDS = 60 V, VGS = 0) Gate–Body Leakage Current, (VGS = 15 V, VDS = 0) ON CHARACTERISTICS Gate Threshold Voltage, (VDS = VGS, ID = 1.0 mA) Static Drain–to–Source On–Resistance, (VGS = 5 V, ID = 0.75 A) Drain–to–Source On–Voltage, (VGS = 5 V, ID = 1.5 A) Forward Transconductance, (VDS = 15 V, ID = 0.75 A) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS Turn–On Delay Time Rise Time Turn–Off Delay Time Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge (VDS = 48 V, ID = 1.5 A, VGS = 5 Vdc) See Figures 15 and 16 (VDD= 25 V, ID = 6 A VGS = 5 V, RG = 50 ohms, RGS = 25 ohms) td(on) tr td(off) tf Qg Qgs Qgd — — — — — — — 20 95 38 50 7 1.3 6.3 — — ns — — 15 — — nC (VDS = 25 V, VGS = 0, f = 1 MHz) Ciss Coss Crss — — — 500 175 40 — — — pF VGS(th) RDS(on) VDS(on) gFS 1 — — — — — — 2.1 2 0.18 0.36 — Vdc Ohms Vdc mhos V(BR)DSS IDSS IGSS 60 — — — — — — 10 100 Vdc µAdc nAdc Symbol Min Typ Max Unit SOURCE DRAIN DIODE CHARACTERISTICS(1) Forward On–Voltage Forward Turn–On Time Reverse Recovery Time IS = 1.5 A, VGS = 0 IS = 1.5 A, VGS = 0, dlS/dt = 400 A/µs, VR = 30 V VSD ton trr — — 1.0 — Vdc Limited by stray inductance 55 — ns (1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2% 2 Motorola TMOS Power MOSFET Transistor Device Data www.DataSheet4U.com 10 6.0 V 5.5 V ID , DRAIN CURRENT (AMPS) 8.0 VGS(TH), GATE THRESHOLD VOLTAGE (NORMALIZED) 4.5 V 5.0 V TJ = 25°C 4.0 V 1.2 MMFT3055EL VDS = VGS ID = 1.0 mA 1.1 6.0 3.5 V 1.0 4.0 3.0 V 2.0 VGS = 2.5 V 0 0 1.0 2.0 3.0 4.0 5.0 0.9 0.8 0.7 –50 0 50 TJ, JUNCTION TEMP (°C) 100 150 VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) Figure 1. On Region Characteristics Figure 2. Gate–Threshold Voltage Variation With Temperature RDS(on) , DRAIN–TO–SOURCE RESISTANCE (OHMS) 0.30 VGS = 5 V 0.25 TJ = 100°C 0.20 25°C 0.15 55°C 0.10 0.05 0 10 TJ = –55°C ID , DRAIN CURRENT (AMPS) 8.0 100°C 6.0 25°C VDS = 8 V 4.0 2.0 0 0 2.0 4.0 6.0 7.0 0 1.0 2.0 ID, DRAIN CURRENT (AMPS) 3.0 4.0 VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) Figure 3. Transfer Characteristics Figure 4. On–Resistance versus Drain Current RDS(on) , DRAIN–TO–SOURCE RESISTANCE (OHMS) 0.5 TJ = 25°C ID = 1.5 A RDS(on) , DRAIN–TO–SOURCE RESISTANCE (OHMS) 0.4 VGS = 5 V ID = 1.5 A 0.3 0.4 0.3 0.2 0.2 0.1 0 2.0 0.1 3.0 4.0 5.0 6.0 7.0 8.0 0 –50 0 50 TJ, JUNCTION TEMP (°C) 100 150 VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) Figure 5. On–Resistance versus Gate–to–Source Voltage Figure 6. On–Resistance versus Junction Temperature Motorola TMOS Power MOSFET Transistor Device Data 3 MMFT3055EL www.DataSheet4U.com FORWARD BIASED SAFE OPERATING AREA The FBSOA curves define the maximum drain–to–source voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. Because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. The curves are based on an ambient temperature of 25°C and a maximum junction temperature of 150°C. Limitations for repetitive pulses at various ambient temperatures can be determined by using the thermal response curves. Motorola Application Note, AN569, “Transient Thermal Resistance– General Data and Its Use” provides detailed instructions. SWITCHING SAFE OPERATING AREA The switching safe operating area (SOA) is the boundary that the load line may traverse without incurring damage to the MOSFET. The fundamental limits are the peak current, IDM and the breakdown voltage, BVDSS. The switching SOA is applicable for both turn–on and turn–off of the devices for switching times less than one microsecond. 0.01 0.1 10 ID , DRAIN CURRENT (AMPS) 1.0 20 ms VGS = 15 V SINGLE PULSE TA = 25°C 0.1 DC 100 ms 1s 500 ms RDS(on) LIMIT THERMAL LIMIT 10 1.0 VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) 100 Figure 7. Maximum Rated Forward Biased Safe Operating Area 1.0 r(t), EFFECTIVE THERMAL RESISTANCE (NORMALIZED) D = 0.5 0.2 0.1 0.1 0.05 0.02 P(pk) RθJA(t) = r(t) RθJA RθJA = 156°C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) – TC = P(pk) RθJA(t) 0.01 0.01 SINGLE PULSE t1 t2 DUTY CYCLE, D = t1/t2 1.0E–01 0.001 1.0E–05 1.0E–04 1.0E–03 1.0E–02 t, TIME (s) 1.0E+00 1.0E+01 Figure 8. Thermal Response COMMUTATING SAFE OPERATING AREA (CSOA) The Commutating Safe Operating Area (CSOA) of Figure 10 defines the limits of safe operation for commutated source–drain current versus re–applied drain voltage when the source–drain diode has undergone forward bias. The curve shows the limitations of IFM and peak VDS for a given rate of change of source current. It is applicable when waveforms similar to those of Figure 9 are present. Full or half–bridge PWM DC motor controllers are common applications requiring CSOA data. Device stresses increase with increasing rate of change of source current so dIS/dt is specified with a maximum value. Higher values of dIS/dt require an appropriate derating of IFM, peak VDS or both. Ultimately dIS/dt is limited primarily by device, package, and circuit impedances. Maximum device stress occurs during trr as the diode goes from conduction to reverse blocking. VDS(pk) is the peak drain–to–source voltage that the device must sustain during commutation; I FM is the maximum forward source–drain diode current just prior to the onset of commutation. VR is specified at 80% rated BVDSS to ensure that the CSOA stress is maximized as IS decays from IRM to zero. RGS should be minimized during commutation. TJ has only a second order effect on CSOA. Stray inductances in Motorola’s test circuit are assumed to be practical minimums. dV DS /dt in excess of 10 V/ns was attained with dI S /dt of 400 A/µs. 4 Motorola TMOS Power MOSFET Transistor Device Data www.DataSheet4U.com 15 V VGS 0 IFM 90% IS 10% ton IRM tfrr VDS(pk) VR VDS VdsL MAX. CSOA STRESS AREA 0.25 IRM dlS/dt trr MMFT3055EL Vf Figure 9. Commutating Waveforms 10 RGS IS , SOURCE CURRENT (AMPS) 8.0 – VR + 4.0 IFM + 20 V – IS VDS Li DUT 6.0 2.0 VGS 0 0 20 40 60 80 VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) VR = 80% OF RATED VDSS VdsL = Vf + Li ⋅ dlS/dt Figure 10. Commutating Safe Operating Area (CSOA) Figure 11. Commutating Safe Operating Area Test Circuit BVDSS L VDS IL VDD t RG VDD tP t, (TIME) IL(t) Figure 12. Unclamped Inductive Switching Test Circuit Figure 13. Unclamped Inductive Switching Waveforms Motorola TMOS Power MOSFET Transistor Device Data 5 MMFT3055EL www.DataSheet4U.com VGS 1800 1600 C, CAPACITANCE (pF) 1400 1200 1000 800 600 400 200 0 15 10 5 0 5 Coss Crss 10 15 20 VDS = 0 Crss Ciss Ciss Coss VGS = 0 TJ = 25°C VDS GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOL