Ultra Precision Dual 2:1 CML Mux

Micrel Precision Edge™ ULTRA PRECISION DUAL 2:1 CML SY58025U MUX WITH INTERNAL I/O TERMINATION Precision Edge™ SY58025U FEATURES s Two independent differential 2:1 multiplexers s Guaranteed AC performance over temperature and Precision Edge™ voltage: • DC-to >10.7Gbps data rate throughput DESCRIPTION • <290ps IN-to-Out tpd • <70ps tr / tf times The SY58025U features two ultra-fast, low jitter 2:1 s Unique, patent-pending input isolation design differential muxes with a guaranteed maximum data or clock minimizes crosstalk throughput of 10.7Gbps or 7GHz, respectively. s Ultra-low jitter design: The SY58025U differential inputs include a unique, • <1psrms random jitter internal termination design that allows access to the • <10pspp deterministic jitter termination network through a VT pin. The device easily • <10pspp total jitter (clock) interfaces to different logic standards, both AC- and DC• <0.7psrms crosstalk-induced jitter coupled, without external resistor-bias and termination s Unique, patent-pending 50Ω input termination and networks. The result is a clean, stub-free, low jitter interface VT pin accepts DC-coupled and AC-coupled inputs solution. The differential CML output is optimized for 50Ω (CML, LVDS, PECL) environments with internal 50Ω source termination and a 400mV output swing. s Typical 400mV CML output swing (RL = 50Ω) The SY58025U operates from a 2.5V or 3.3V supply and s Internal 50Ω input termination is guaranteed over the full industrial temperature range s Power supply 2.5V ±5% or 3.3V ±10% (–40°C to +85°C). The SY58025U is part of Micrel’s Precision s –40°C to +85°C temperature range www.DataSheet4U.com Edge™ product family. s Available in 32-pin (5mm × 5mm) MLF™ package All support documentation can be found on Micrel’s web site at www.micrel.com. APPLICATIONS s s s s Data communication systems All SONET OC3-OC-768 applications All Fibre Channel applications All GigE applications FUNCTIONAL BLOCK DIAGRAM INA0 50Ω VTA0 50Ω /INA0 VREF-ACA0 INA1 50Ω VTA1 50Ω /INA1 VREF-ACA1 SELA (TTL/CMOS) 1 S MUX A 0 INB0 50Ω VTB0 50Ω 0 QA /QA /INB0 VREF-ACB0 INB1 50Ω VTB1 50Ω /INB1 VREF-ACB1 SELB (TTL/CMOS) 1 S MUX B QB /QB AnyGate and Precision Edge are trademarks of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. M9999-051804 hbwhelp@micrel.com or (408) 955-1690 Rev.: A Amendment: /0 1 Issue Date: May 2004 Micrel Precision Edge™ SY58025U PACKAGE/ORDERING INFORMATION /INA1 VREF-ACA1 VTA1 INA1 /INA0 VREF-ACA0 VTA0 INA0 Ordering Information(1) Part Number GND VCC QA /QA VCC NC SELA VCC Package Type MLF-32 MLF-32 Operating Range Industrial Industrial Package Marking SY58025U SY58025U INB0 VTB0 VREF-ACB0 /INB0 INB1 VTB1 VREF-ACB1 /INB1 1 2 3 4 5 6 7 8 32 3130 29 28 27 26 25 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 SY58025UMI SY58025UMITR(2) Notes: 1. Contact factory for die availability. Dies are guaranteed at TA = 25°C, DC electricals only. 2. Tape and Reel. 32-Pin MLF™ (MLF-32) PIN DESCRIPTION Pin Number 25, 28, 29, 32, 1, 4, 5, 8 Pin Name INA0, /INA0, INA1, /INA1, INB0, /INB0, INB1, /INB1 Pin Function Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC- or DC-coupled differential signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50Ω. Note that these inputs will default to an indeterminate state if left open. Unused differential input pairs can be terminated by connecting one input to VCC and the complementary input to GND through a 1kΩ resistor. The VT pin is to be left open in this configuration. Please refer to the “Input Interface Applications” section for more details. Input Termination Center-Tap: Each side of the differential input pair, terminates to a VT pin. Each VT pin provides a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more details. Bank A, Bank B Input Channel Select (TTL/CMOS): These TTL/CMOS-compatible inputs select the inputs to the multiplexers. These inputs are internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left open. Input switching threshold is VCC/2. Reference Output Voltage: These outputs bias to VCC –1.2V. Connect to the VT pin when AC-coupling the data inputs. Bypass with 0.01µF low ESR capacitor to VCC. Maximum current source or sink is 0.5mA. See “Input Interface Applications” section. Positive Power Supply: Bypass with 0.1µF0.01µF low ESR capacitors. Differential CML Outputs: MUX A and MUX B selected CML outputs. See “Output Interface Applications” section for termination. Refer to the “Truth Table” for logic operation. Ground: Ground pin and exposed pad must be connected to the same ground plane. Not connected. 26, 30, 2, 6 VTA0 , VTA1, VTB0, VTB1 SELA, SELB 18, 15 27, 31, 3, 7 VREF-ACA0, VREF-ACA1, VREF-ACB0, VREF-ACB1 VCC QA, /QA, QB, /QB GND, Exposed pad NC 10, 13, 16, 17, 20, 23 22, 21, 12, 11 9, 24 14, 19 M9999-051804 hbwhelp@micrel.com or (408) 955-1690 GND VCC /QB QB VCC NC SELB VCC 2 Micrel Precision Edge™ SY58025U Absolute Maximum Ratings(1) Power Supply Voltage (VCC ) ...................... –0.5V to +4.0V Input Voltage (VIN) ......................................... –0.5V to VCC CML Output Voltage (VOUT) ........... VCC–1.0V to VCC+0.5V Termination Current(3) Source or sink current on VT pin ........................ ±100mA Input Current Source or sink current on IN, /IN pin .................... ±50mA Current (VREF-AC) Source or sink current on VREF-AC(3) .................. ±1.5mA Lead Temperature (soldering, 10 sec.) ..................... 265°C Storage Temperature Range (TS ) ........... –65°C to +150°C Operating Ratings(2) Power Supply Voltage (VCC) ............... +2.375V to +2.625V ............................................................ +3.0V to +3.6V Ambient Temperature Range (TA) ............. –40°C to +85°C Package Thermal Resistance(4) MLF™ (θJA) Still-Air ............................................................. 35°C/W MLF™ (ψJB) Junction-to-board ............................................ 20°C/W DC ELECTRICAL CHARACTERISTICS(5) TA = –40°C to +85°C; unless otherwise stated. Symbol VCC ICC RDIFF_IN RIN VIH VIL VIN VDIFF_IN VT IN VREF-AC Notes: 1. Permanent device damage may occur if the ratings in “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability, use for input of the same package only. 4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential (GND) on the PCB. ΨJB uses 4layer θJA in still air unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. Includes current through internal 50Ω pull-ups. See Figure 1b. Parameter Power Supply Power Supply Current Differential Input Resistance (IN-to-/IN) Input Resistance (IN-to-VT, /IN-to-VT) Input High Voltage (IN, /IN) Input Low Voltage (IN, /IN) Input Voltage Swing (IN, /IN) Differential Input Voltage Swing |IN - /IN| In to VT (IN, /IN) Output Reference Voltage Condition VCC = 2.5V VCC = 3.3V No load, max. VCC.(6) Min 2.375 3.0 Typ 2.5 3.3 115 Max 2.625 3.6 140 120 60 VCC VIH –0.1 1.7 3.4 1.28 Units V V mA Ω Ω V V V V V V 80 40 VIN must be ≥ 1.2V. See Figure 1a. See Figure 1b. VCC –1.6 0 0.1 0.2 100 50 VCC–1.3 VCC–1.2 VCC–1.1 M9999-051804 hbwhelp@micrel.com or (408) 955-1690 3 Micrel Precision Edge™ SY58025U CML OUTPUT DC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to +85°C; RL = 100Ω across each output pair, or equivalent, unless otherwise stated. Symbol VOH VOUT VDIFF-OUT ROUT Parameter Output High Voltage Q, /Q Output Voltage Swing Q, /Q Differential Output Voltage Swing Q, /Q Output Source Impedance Q, /Q See Figure 1a. See Figure 1b. Condition Min VCC–0.020 325 650 40 400 800 50 60 Typ Max VCC Units V mV mV Ω LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V ±5% or 3.3V ±10%; TA= –40°C to 85°C unless otherwise stated. Symbol VIH VIL IIH IIL Parameter Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current –125 –300 Condition Min 2.0 0.8 50 Typ Max Units V V µA µA Note: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. M9999-051804 hbwhelp@micrel.com or (408) 955-1690 4 Micrel Precision Edge™ SY58025U AC ELECTRICAL CHARACTERISTICS(8) VCC = 2.5V ±5% or 3.3V ±10%; TA= –40°C to +85°C; RL = 100Ω across each output pair, or equivalent, unless otherwise stated. Symbol fMAX tpd Parameter Maximum Operating Frequency VOUT ≥ 200mV Propagation Delay IN-to-Q SEL-to-Q tSKEW Input-to-Input Skew (Within-Bank) Bank-to-Bank Skew Part-to-Part Skew tJITTER Data Clock Random Jitter (RJ) Deterministic Jitter (DJ) Cycle-to-Cycle Jitter Total Jitter (TJ) Crosstalk-Induced Jitter Channel-to-Channel t r, t f Notes: 8. High-speed AC parameters are guaranteed by design and characterization. VIN swing ≥ 100mV unless otherwise noted. 9. Input-to-input skew is the difference in time between two inputs to the output within a bank. 10. Bank-to-bank skew is the difference in time from input to the output between bank. 11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at th