1:2 CML FANOUT BUFFER/TRANSLATOR

www.DataSheet4U.com Micrel, Inc. 7GHz, 1:2 CML FANOUT BUFFER/TRANSLATOR WITH INTERNAL I/O TERMINATION SY58011U Precision Edge® SY58011U FEATURES Precision 1:2, 400mV CML fanout buffer Guaranteed AC performance over temperature/ voltage: • > 7GHz fMAX clock • < 60ps tr / tf times • < 250ps tpd • < 15ps max. skew Low jitter performance: • < 10psPP total jitter (clock) • < 1psRMS random jitter (data) • < 10psPP deterministic jitter (data) Accepts an input signal as low as 100mV Unique input termination and VT pin accepts DCcoupled and AC-coupled differential inputs: LVPECL, LVDS, and CML 50Ω source terminated CML outputs Power supply 2.5V ±5% and 3.3V ±10% Industrial temperature range: –40°C to +85°C Available in 16-pin (3mm × 3mm) MLF® package Precision Edge® DESCRIPTION The SY58011U is a 2.5V/3.3V precision, high-speed, fully differential 1:2 CML fanout buffer. Optimized to provide two identical output copies with less than 15ps of skew and less than 10ps(pk-pk) total jitter, the SY58011U can process clock signals as fast as 7GHz or data patterns up to 10.7Gbps. The differential input includes Micrel’s unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS, or CML differential signals, (AC-coupled or DC-coupled) as small as 100mV without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an on-board output reference voltage (VREF-AC) is provided to bias the VT pin. The outputs are compatible with 400mV typical swing into 50Ω loads, with extremely fast rise/fall times guaranteed to be less than 60ps. The SY58011U operates from a 2.5V ±5% supply or 3.3V ±10% supply and is guaranteed over the full industrial temperature range (–40°C to +85°C). For applications that require LVPECL outputs, consider the SY58012U or SY58013U 1:2 fanout buffer with 800mV and 400mV output swing, respectively. The SY58011U is part of Micrel’s highspeed, Precision Edge™ product line. Data sheets and support documentation can be found on Micrel’s web site at www.micrel.com. APPLICATIONS s s s s All SONET and GigE clock distribution Fibre Channel clock and data distribution Backplanes Data distribution: OC-48, OC-48+FEC, XAUI s High-end, low skew, multiprocessor synchronous clock distribution TYPICAL PERFORMANCE 2GHz Output FUNCTIONAL BLOCK DIAGRAM Output Swing (100mV/div.) VCC = 2.5V IN 50Ω VT 50Ω /IN VREF-AC Q0 /Q0 Q1 /Q1 TIME (70ps/div.) 2GHz with 100mV Input Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-020207 hbwhelp@micrel.com or (408) 955-1690 Rev.: D Amendment: /0 1 Issue Date: February 2007 Micrel, Inc. SY58011U PACKAGE/ORDERING INFORMATION GND GND VCC VCC Ordering Information(1) Part Number 12 11 10 9 16 15 14 13 Package Type MLF-16 MLF-16 MLF-16 MLF-16 Operating Range Industrial Industrial Industrial Industrial Package Marking 011U 011U 011U with Pb-Free bar-line indicator 011U with Pb-Free bar-line indicator Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu IN VT VREF-AC /IN 1 2 3 4 5 6 7 8 Q0 /Q0 /Q1 Q1 SY58011UMI SY58011UMITR(2) SY58011UMG(3) SY58011UMGTR(2, 3) GND VCC GND VCC 16-Pin MLF® (MLF-16) Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs. PIN DESCRIPTION Pin Number 1, 4 Pin Name IN, /IN Pin Function Differential Input: This input pair is the signal to be buffered. Each pin of this pair internally terminates with 50Ω to the VT pin. Note that this input will default to an indeterminate state if left open. See “Input Interface Applications” section. Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap for each input (IN, /IN) to a termination network for maximum interface flexibility. See “Input Interface Applications” section. Reference Output Voltage: This output biases to VCC –1.2V. It is used when AC-coupling the inputs (IN, /IN). Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor to VCC. Maximum current source or sink is 0.5mA. See “Input Interface Applica tions” section. Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the VCC pins as possible. Ground. Exposed pad must be connected to a ground plane that is the same potential as the ground pin. CML Differential Output Pairs: Differential buffered output copy of the input signal. The output swing is typically 400mV. Unused output pairs may be left floating with no impact on jitter. See “CML Output Termination” section. 2 VT 3 VREF-AC 5, 8, 13, 16 6, 7, 14, 15 12, 11 9, 10 VCC GND, (Exposed Pad) Q0, /Q0, Q1, /Q1 M9999-020207 hbwhelp@micrel.com or (408) 955-1690 2 Micrel, Inc. SY58011U Absolute Maximum Ratings(Note 1) Power Supply Voltage (VCC) ....................... –0.5V to +4.0V Input Voltage (VIN) ......................................... –0.5V to VCC CML Output Voltage (VOUT) ........... VCC–1.0V to VCC+0.5V Current (VT) Source or sink current on VT pin ........................ ±100mA Input Current Source or sink current on IN, /IN .......................... ±50mA Current (VREF) Source or sink current on VREF-AC, Note 4 ........ ±1.5mA Lead Temperature Soldering, (20 seconds) .............. 260°C Storage Temperature Range (TSTORE) .... –65°C to +150°C Operating Ratings(Note 2) Supply Voltage (VCC) ............................ +2.375V to +3.60V Operating Temperature Range (TA) ........... –40°C to +85°C Package Thermal Resistance, Note 3 MLF® (θJA) Still-Air ............................................................. 60°C/W 500lfpm ............................................................ 54°C/W MLF® (ψJB) .......................................................... 33°C/W DC ELECTRICAL CHARACTERISTICS(Note 5) TA= –40°C to +85°C Symbol VCC ICC VIH VIL VIN VDIFF_IN RIN VREF-AC IN to VT Parameter Power Supply Voltage Power Supply Current Input HIGH Voltage Input LOW Voltage Input Voltage Swing Differential Input Voltage Swing Into VT Resistance Output Reference Voltage Max. VCC, no load IN, /IN IN, /IN see Figure 1a. see Figure 1b. VCC–1.2 0 0.1 0.2 40 VCC –1.3 50 VCC –1.2 Condition Min 2.375 75 Typ Max 3.60 95 VCC VIH–0.1 1.7 3.4 60 VCC –1.1 1.28 Units V mA V V V V Ω V V CML DC ELECTRICAL CHARACTERISTICS(Note 5) VCC = 3.3V ±10% or 2.5V ±5%; TA = –40°C to +85°C; RL = 100Ω across each output pair, or equivalent, unless otherwise stated. Symbol VOH VOUT VDIFF_OUT ROUT Parameter Output HIGH Voltage Output Voltage Swing Differential Output Voltage Swing Output Source Impedance Condition Q0, /Q0, Q1, /Q1 Q0, /Q0, Q1, /Q1; see Figure 1a Q0, /Q0, Q1, /Q1; see Figure 1b Q0, /Q0, Q1, /Q1 Min Typ Max VCC Units V mV mV 60 Ω VCC –0.020 VCC –0.010 325 650 40 400 800 50 Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Thermal performance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential (gnd) on the pcb. 4. Due to the limited drive capability, use for input of the same package only. 5. The circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established. M9999-020207 hbwhelp@micrel.com or (408) 955-1690 3 Micrel, Inc. SY58011U AC ELECTRICAL CHARACTERISTICS (Note 7) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to +85°C; RL = 100Ω across each output pair, or equivalent, unless otherwise stated. Symbol fMAX tpd tCHAN tSKEW tJITTER Parameter Maximum Operating Frequency VOUT ≥ 200mV Propagation Delay Channel-to-Channel Skew Part-to-Part Skew Data Clock tr, tf Notes: 7. 8. 9. High frequency AC electricals are guaranteed by design and characterization. Skew is measured between outputs of the same bank under identical transitions. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. Condition NRZ Data Clock Min Typ 10.7 Max Units Gbps GHz 7 100 8 170 3 250 15 100 1 10 1 10 VIN ≥ 100mV Note 8 Note 9 Note 10 Note 11 Note 12 Note 13 20% to 80% at full output swing ps ps ps psRMS psPP psRMS psPP ps Random Jitter (RJ) Deterministic Jitter (DJ) Cycle-to-Cycle Jitter Total Jitter (TJ) Output Rise/Fall Time 20 40 60 10. RJ is measured with a K28.7 comma detect character pattern, measured at 10.7Gbps and 2.5Gbps/3.2Gbps. 11. DJ is measured at 10.7Gbps and 2.5Gbps/3.2Gbps with both K28.5 and 223–1 PRBS pattern 12. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn–Tn–1 where T is the time between rising edges of the output signal. 13. Total jitter definition: With an ideal clock input of frequency ≤ fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. TIMING DIAGRAM /IN IN /Q Q tpd SINGLE-ENDED AND DIFFERENTIAL SWINGS VIN, VOUT (Typ. 400mV) VDIFF_IN, VDIFF_OUT (Typ. 800mV) Figure 1a. Single-Ended Voltage Swing Figure 1b. Differential Voltage Swing M9999-020207 hbwhelp@micrel.com or (408) 955-1690 4 Micrel, Inc. SY58011U TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, GND = 0, VIN = 100mV, TA = 25°C, unless otherwise stated. Frequency vs. Amplitude WITHIN-DEVICE SKEW (ps) 10000 500 450 AMPLITUDE (mV) 10 9 8 7 6 5 4 3 2 Within-Device Skew vs. Temperature 400 350 300 250 200 150 100 50 120