I2C SINGLE FREQUENCY DEFLECTION PROCESSOR AND 70 MHz RGB PREAMPLIFIER

STV2000 I2C SINGLE FREQUENCY DEFLECTION PROCESSOR AND 70 MHz RGB PREAMPLIFIER PRELIMINARY DATA FEATURES Horizontal deflection s Single frequency, self adaptive oscillator. s TTL compatible positive going sync. 2 s IC controlled: H-position, Pin Cushion, Keystone, Parallelogram, Side Pin Balance,Hamplitude. s DC East/West feedback. s DC controls: H-width breathing compensation. s X-Ray protection Vertical deflection s Vertical ramp generator. s Wide range AGC loop. s TTL compatible positive going sync, no extra pulses. 2 s I C controls: vertical position and S-correction. s DC controls: height breathing compensation. Video preamplifier s 3-channel 70MHz bandwidth RGB preamplifier. s 5ns typical rise and fall time at 4VPP. 2 s I C controls: RGB contrast, cut-off, brightness, contrast up-date during vertical retrace time. s ABL will reduce gain (contrast). s 0.514V typical video input signal for normal display. I2C Main features 2 s I C interface (slave) 100kHz max. 2 s All I C controlled DAC are 7bit, except for RGB gain and cut-off. s Power- on- reset at 5 V (VDD). s 0.5 to 4 V static DAC output. Supply voltage & power s 5 V/10.5 V dual supply. s Max power consumption: 1.2W DESCRIPTION The STV2000 is an I2C-controlled monolithic integrated circuit assembled in a TQFP44 plastic package. It combines both a deflection block (horizontal and vertical, single frequency with very powerful geometry correction) and a 70MHz RGB pre-amplifier. TQFP44 ORDER CODE : PIN CONNECTIONS FILTER PLL2C HGND Hfly Href Hout Ro Co PLL1F Hin FC1 Vin Vref VAGCAP VGND VCAP Vout VBRTHin VRB VAVcc Out1 Cut-off 1 44 43 42 41 40 39 38 37 36 35 34 33 1 32 2 31 3 30 4 29 5 28 6 27 7 8 26 25 9 10 24 11 23 12 13 14 15 16 17 18 19 20 21 22 AGND Out2 Cut-off2 PGDN Out3 Cut-off3 PVcc In1 ABLin In2 DAC LGDN SAVcc SCL SDA V DD (5V) EWout EWFBin HBRTHin N.C. VBDC In3 Version 3.0 April 2000 This is preliminary information on a new product now in development. Details are subject toDetails are subject to change without notice. in development or undergoing evaluation. change without notice. 1/38 1 TABLE OF CONTENTS PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 THERMAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SYNC INPUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 I2C READ/WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 HORIZONTAL SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 VERTICAL SECTION) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VIDEO PRE-AMP SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 LOGIC SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 I2C BUS ADDRESS TABLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 TYPICAL OUTPUT WAVEFORMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 OPERATING DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SCANNING PART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PRE-AMPLIFIER PART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 STAND-BY MODE AND PROTECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 INTERNAL SCHEMATICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 2 2/38 2 STV2000 PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Name Vin Vref VAGCCAP VGND VCAP Vout VBRTHin VRB VAVcc OUT1 Cut-off1 AGND OUT2 Cutoff2 PGND OUT3 Cutoff3 PVcc IN1 ABLin IN2 DAC IN3 VBDC N.C. HBRTHin EWFBin EWout VDD SDA SCL SAVcc LGND Hout Href Hfly HGND PLL2C Filter PLL1F Co Ro FC1 Hin Function Vertical Sync Input Vertical Section Reference Voltage Vertical AGC Loop Capacitor Vertical Section Ground Vertical Sawtooth Generator Capacitor Vertical Output Vertical Breathing DC Input Vertical Ramp Filter Video Section Analog Supply (10.5V typ) Video Output 1 Cut-off1 DAC voltage output pin Video Analog Ground Video Output 2 Cut-off2 DAC voltage output pin Video Section Power Ground Video Output 3 Cut-off3 DAC voltage output pin Video Section Power Supply (10.5V typ) Video Input 1 Video Automatic Beam Current Compensation Input Video Input 2 7bits DAC Voltage Output Video Input 3 Vertical Blanking Output with DC level adjusted by DAC Not to be connected Horizontal Breathing Compensation DC Input EW Correction Feedback Input EW Buffer Output Bus, Scanning Logic and Video Logic Supply (5V typ) I2C Data Input I2C Clock Input Scanning Section Analog Supply (10.5Vtyp) Bus and Scanning Power Ground Horizontal Driver Output, open collector Horizontal Section Reference Voltage Horizontal Flyback Input, Positive Horizontal Section Ground PLL2 Loop Filter Horizontal Filter Capacitor (HPOS) PLL1 Loop Filter Horizontal Oscillator Capacitor Horizontal Oscillator Resistor PLL1 filter capacitor Horizontal Sync Input 3/38 3 3 4/38 PLL1F 40 SAVCC 32 Href 35 Vref 2 Vpos Vamp Scorr VOSC RAMP Generator SPB X2 Geometry Tracking X2 EWPCC EW OUTPUT 28 EWout 27 EWFBin Href Vref Phase Freq Comp VCO Phase Comp Phase Shifter HOUT Buffer Safety Filter 39 FC1 Ro 43 42 Co HFly 41 36 PLL2C 38 Hout 34 Hin 44 Vin 1 HGND 37 VGND 4 VCAP 5 VAGCCAP 3 VBRTHin 7 Vout 6 VRB 8 SDA 30 SCL 31 VDD 29 LGND 33 IN1 19 Hsync Clamp I2C BUS DECODER Contrast LATCHES & DACs Brightness Drive BPCP Output Stage DAC KeyBal X HFly Hsync Vsync KEYST BLOCK DIAGRAM 26 HBRTHin 20 ABLin STV2000 + H Breathing ABL Blanking 24 VBDC 22 DAC 9 VAVCC 12 AGND 10 OUT 1 11 Cut-off 1 18 PV CC 13 OUT 2 14 Cut-off 2 15 PGND 16 OUT 3 IN2 21 IN3 23 17 Cut-off 3 STV2000 STV2000 ABSOLUTE MAXIMUM RATINGS Symbol SAVcc VAVcc PVcc Vdd VESD Tstg Tj Toper Parameter Scanning Section Analog Supply Voltage Video Section Analog Supply Voltage Supply Voltage for Video Pre-Amp Section Logic Section Supply Voltage ESD susceptibility HBM model 100pF & 1.5kΩ EIAJ Norm 200pF & 0Ω Storage Temperature Junction Temperature Operating Temperature (Device ambient) Value 13.5 13.5 13.5 5.5 2 300 -40 to 150 150 0 to 70 Unit V V V V kV V oC o o C C THERMAL DATA Symbol R TH(j-a) Parameter Junction to Ambient Thermal Resistance (MAX) Value 46 Unit oC/W SYNC INPUT Operating Conditions (VDD = 5V, Tamb = 25°C) Symbol HSVR MinD Mduty VSVR VSW VSD Parameter Voltage on Hin Min Hin pulse duration Max Hin Duty Cycle Voltage on Vin Min Vin pulse duration Max Vin Duty Cycle Test Conditi ons Pin 44 Pin 44 Pin 44 Pin 1 Pin 1 Pin 1 0 5 15 Min 0 0.7 25 5 Typ Max 5 Unit V us % V us % Electrical Characteristics (VDD = 5V, Tamb = 25°C) V INTH RIN Horizontal & Vertical Input Logic Level Horizontal & Vertical Pull-Up Resistor Low Level High Level 0.8 2.2 200 V V kΩ 5/38 4 STV2000 I2C READ/WRITE Electrical Characteristics (VDD = 5V, Tamb = 25°C) Symbol FSCL TLOW THIGH VINL VINH VACK Parameter Maximum Clock Frequency Low Period of the SCL Clock High Period of SCL Clock SDA & SCL Input Low Level Voltage SDA & SCL Input High Level Voltage Acknowledge Output Voltage on SDA input with 3mA 3 0.4 1.3 0.6 1.5 Test Conditi ons Min Typ Max 100 Unit kHz us us V V V HORIZONTAL SECTION Operating Conditions Symbol VCO Ro(min) Co(min) Fmax Minimum Oscillator Resistor Minimum Oscillator Capacitor Maximum Oscillator Frequency 6 390 150 kΩ pF kHz Parameter Test Conditi ons Min Typ Max Unit OUTPUT SECTION IHFB IHOUT Horizontal FlyBack Input Maximum Current Horizontal Drive Output Maximum Sink Current 5 15 mA mA Electrical Characteristics (VDD = 5V, Tamb = 25°C) Symbol Parameter Test Conditi ons Min Typ Max Unit SUPPLY AND REFERENCE VOLTAGES Vcc Vdd Icc Idd VHREF VVREF IHREF IVREF Supply Voltage Supply Voltage Supply Current Supply Current Horizontal Reference Voltage Vertical Reference Voltage Horizontal Reference Maximum Source Current Vertical Reference Maximum Source Current I=-2mA I=-2mA 7.4 7.4 9.5 4.5 10.5 5 30 5 8 8 8.6 8.6 5 5 11.5 5.5 V V mA mA V V mA mA 6/38 4 STV2000 Operating Conditions Symbol 1st PLL SECTION V clamp VVCO AVCO HPHASE VPMIN VPTYP VPMAX IPLL1-UL I PLL1-L fO dfo/dT VCO clamp Voltage range VCO clamp Voltage, at POR VCO Gain Horizontal Phase Adjustment Range Horizontal Phase Minimum Typical Maximum PLL1 Charge Pump Current Free Running Frequency, no input at POR, lower clamp voltage at max. Free Running Frequency Thermal Drift VHREF=8V VHREF=8V Ro=6490Ω, Co=820pF, dF/dV=1/11RoCo % of Horizontal Period SubAdd 07 X1111111 X1000000 X0000000 Unlocked Locked Ro=6490Ω, Co=820pF 3.0 3.8 17.1 +/-10 2.8 3.4 4.0 +/-140 +/-1 65 -150 3.8 V V kHz/V % V V V µA mA kHz ppm/ oC Parameter Test Conditi ons Min Typ Max Unit 2nd PLL SECTION & HORIZONT AL OUTPUT SECTION VTHFB JitterH H DC Flyback Input Threshold Voltage Horizontal Jitter Horizontal Drive Output Duty Cycle (Ratio