N-CHANNEL Power MOSFET

www.DataSheet4U.com STB180N55 STP180N55 N-CHANNEL 55V - 2.9mΩ - 120A - D²PAK - TO-220 MDmesh™ Low Voltage Power MOSFET TARGET SPECIFICATION General features Type STB180N55 STP180N55 ■ ■ VDSS 55V 55V RDS(on) 3.5mΩ 3.8mΩ ID 120A (Note 1) 120A (Note 1) 3 1 1 2 3 ULTRA LOW ON-RESISTANCE 100% AVALANCHE TESTED D²PAK TO-220 Description This N-Channel enhancement mode MOSFET is the latest refinement of STMicroelectronic unique “Single Feature Size™“ strip-based process with less critical aligment steps and therefore a remarkable manufacturing reproducibility. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and low gate charge. Internal schematic diagram Applications ■ HIGH CURRENT SWITCHING APPLICATION Order codes Sales Type STB180N55 STP180N55 Marking B180N55 P180N55 Package D²PAK TO-220 Packaging TAPE & REEL TUBE January 2006 This is a preliminary information on a new product foreseen to be developed. Details are subject to change without notice Rev 1 1/11 www.st.com 11 1 Electrical ratings STP180N55 - STB180N55 1 Table 1. Electrical ratings Absolute maximum ratings Parameter Drain-source Voltage (VGS=0) Gate-Source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor dv/dt Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Operating Junction Temperature Storage Temperature Value 55 ± 20 120 120 480 315 2.1 TBD TBD -55 to 175 Unit V V A A A W W/°C V/ns mJ °C Symbol VDS VGS ID Note 1 ID Note 1 IDM Note 2 PTOT EAS Note 4 Tj Tstg Table 2. Thermal data TO-220 D²PAK 0.48 62.5 -300 -35 -Unit °C/W °C/W °C/W °C Rthj-case Rthj-a Rthj-pcb Note 5 Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 2/11 STP180N55 - STB180N55 2 Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 3. Symbol V(BR)DSS IDSS On/off states Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate Body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-Source On Resistance Test Conditions ID = 250µA, V GS= 0 VDS = Max Rating, VDS = Max Rating,Tc = 125°C VGS = ±20V VDS= VGS, ID = 250µA VGS= 10V, ID= 60A D²PAK TO-220 2 Min. 55 10 100 ±200 Typ. Max. Unit V µA µA nA V mΩ mΩ IGSS VGS(th) RDS(on) 4 3.5 3.8 Table 4. Symbol gfs Note 3 Ciss Coss Crss Qg Qgs Qgd Dynamic Parameter Forward Transconductance Test Conditions VDS =15V, ID = 60A Min. Typ. TBD 6200 1800 100 110 TBD TBD TBD Max. Unit S pF pF pF nC nC nC Input Capacitance VDS =25V, f=1 MHz, V GS=0 Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=44V, ID = 120A VGS =10V (see Figure 2) 3/11 2 Electrical characteristics STP180N55 - STB180N55 Table 5. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on Delay Time Rise Time Test Conditions VDD=27V, ID= 60A, RG=4.7Ω, VGS=10V (see Figure 3) VDD=27V, ID= 60A, RG=4.7Ω, VGS=10V (see Figure 3) Min. Typ. TBD TBD Max. Unit ns ns Off voltage Rise Time FallTime TBD TBD ns ns Table 6. Symbol ISD ISDM Note 2 VSDNote 3 trr Qrr IRRM Source drain diode Parameter Source-drain Current Source-drain Current (pulsed) Forward on Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD=120A, V GS=0 ISD=120A, di/dt = 100A/µs, VDD=30V, Tj=150°C TBD TBD TBD Test Conditions Min. Typ. Max. 120 480 1.5 Unit A A V ns nC A (1) Current limited by package (2) Pulse width limited by safe operating area (3) Pulsed: pulse duration = 300µs, duty cycle 1.5% (4) Starting Tj=25°C, Id=60A, Vdd=40V (5) When mounted o inch² FR4 2oz Cu 4/11 STP180N55 - STB180N55 3 Test circuits 3 Test circuits Switching Times Test Circuit For Resistive Load Figure 2. Gate Charge Test Circuit Figure 1. Figure 3. Test Circuit For Indictive Load Switching and Diode Recovery Times Figure 5. Unclamped Inductive Load Test Circuit Figure 4. Unclamped Inductive Waveform Figure 6. Switching Time Waveform 5/11 4 Package mechanical data STP180N55 - STB180N55 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 6/11 STP180N55 - STB180N55 4 Package mechanical data TO-220 MECHANICAL DATA DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154 øP Q 7/11 4 Package mechanical data STP180N55 - STB180N55 D2PAK MECHANICAL DATA TO-247 MECHANICAL DATA mm. DIM. MIN. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2 0º 4.88 15 1.27 1.4 2.4 0.4 4º 10 8.5 5.28 15.85 1.4 1.75 3.2 0.192 0.590 0.050 0.055 0.094 0.015 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10.4 0.393 0.334 0.208 0.625 0.055 0.068 0.126 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 MIN. 0.173 0.098 0.001 0.027 0.044 0.017 0.048 0.352 0.315 TYP. MAX. 0.181 0.106 0.009 0.036 0.067 0.023 0.053 0.368 inch 3 1 8/11 STP180N55 - STB180N55 5 Packing mechanical data 5 Packing mechanical data D2PAK FOOTPRINT TAPE AND REEL SHIPMENT REEL MECHANICAL DATA DIM. A B C D G N T 1.5 12.8 20.2 24.4 100 30.4 26.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0795 0.960 1.039 3.937 1.197 BULK QTY 1000 inch MIN. MAX. 12.992 TAPE MECHANICAL DATA DIM. A0 B0 D D1 E F K0 P0 P1 P2 R T W mm MIN. 10.5 15.7 1.5 1.59 1.65 11.4 4.8 3.9 11.9 1.9 50 0.25 23.7 24.3 MAX. 10.7 15.9 1.6 1.61 1.85 11.6 5.0 4.1 12.1 2.1 inch MIN. MAX. 0.413 0.421 0.618 0.626 0.059 0.063 0.062 0.063 0.065 0.073 0.449 0.456 0.189 0.197 0.153 0.161 0.468 0.476 0.075 0.082 1.574 0.35 0.0098 0.0137 0.933 0.956 BASE QTY 1000 * on sales type 9/11 6 Revision History STP180N55 - STB180N55 6 Revision History Date 03-Jan-2006 Revision 1 First release Changes 10/11 STP180N55 - STB180N55 6 Revision History Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 11/11