N-CHANNEL MOSFET

Part  Number STD70N03L
Manufacturer ST Microelectronics
Semiconductor DataSheet

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www.DataSheet4U.com STD70N03L STD70N03L-1 N-channel 30V - 0.0059Ω - 70A - DPAK / IPAK STripFET™ III Power MOSFET General features Type STD70N03L STD70N03L-1 ■ ■ ■ ■ VDSS 30V 30V RDS(on) <0.0073Ω <0.0073Ω ID 70A 70A 3 1 RDS(ON) * Qg industry’s benchmark Conduction losses reduced Switching losses reduced Low threshold device 3 2 1 DPAK IPAK Description This product utilizes the latest advanced design rules of ST’s proprietary STripFET™ technology. This is suitable for the most demanding DC-DC converter application where high efficiency is to be achieved. Internal schematic diagram Applications ■ Switching application Order codes Part number STD70N03L STD70N03L-1 Marking D70N03L D70N03L-1 Package DPAK IPAK Packaging Tape & reel Tube June 2006 Rev 1 1/16 www.st.com 16 Contents STD70N03L - STD70N03L-1 Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 8 3 4 5 6 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 STD70N03L - STD70N03L-1 Electrical ratings 1 Electrical ratings Table 1. Symbol VDS VGS ID ID IDM (1) PTOT Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25°C Drain current (continuous) at TC = 100°C Drain current (pulsed) Total dissipation at TC = 25°C Derating factor Value 30 ± 20 70 50 280 70 0.47 300 -55 to 175 Unit V V A A A W W/°C mJ °C EAS (2) Tj Tstg Single pulse avalanche energy Operating junction temperature Storage temperature 1. Pulse width limited by safe operating area 2. Starting Tj =25°C, Id = 30A, Vdd = 15V Table 2. Symbol Rthj-case Rthj-amb Tl Thermal resistance Parameter Thermal resistance junction-case Max Thermal resistance junction-amb Max Maximum lead temperature for soldering purpose Value 2.14 100 275 Unit °C/W °C/W °C 3/16 Electrical characteristics STD70N03L - STD70N03L-1 2 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 3. Symbol V(BR)DSS IDSS IGSS VGS(th) On/off states Parameter Drain-source breakdown voltage Test condictions ID = 250µA, VGS= 0 Min. 30 1 10 ±100 Typ. Max. Unit V µA µA nA V Zero gate voltage drain VDS = 20V, current (VGS = 0) VDS = 20V,Tc = 125°C Gate body leakage current(VDS = 0) VGS = ±20V 1 Gate threshold voltage VDS= VGS, ID = 250µA VGS= 10V, ID= 35A RDS(on) Static drain-source on resistance VGS= 5V, ID= 35A VGS= 10V, ID= 35A @Tj=125°C VGS= 5V, ID= 35A @Tj=125°C 0.0059 0.0073 0.007 0.013 0.0091 0.0113 0.0108 0.0201 Ω Ω Ω Ω Table 4. Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd Qgls (2) RG Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Third-quadrant gate charge Gate input resistance Test condictions VDS =10V, ID = 15A Min. Typ. 40 2200 380 49 15.7 8.3 3.4 15 1.5 21 Max. Unit S pF pF pF nC nC nC nC Ω VDS =25V, f=1MHz, VGS=0 VDD=15V, ID = 70A VGS =5V (see Figure 7) VDS <0V, VGS =10V f=1MHz Gate DC Bias =0 Test signal level =20mV open drain 1. Pulsed: pulse duration = 300µs, duty cycle 1.5% 2. Gate charge for synchronous operation: see Appendix A: Power losses estimation 4/16 STD70N03L - STD70N03L-1 Electrical characteristics Table 5. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test condictions VDD=15V, ID=35A, RG=4.7Ω, VGS=5V (see Figure 13) Min. Typ. 21 95 19 15 Max. Unit ns ns ns ns Table 6. Symbol ISD ISDM(1) VSD (2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=35A, VGS=0 ISD = 70A, di/dt=100A/µs, VDD=20V, Tj=150°C (see Figure 18) 32 51 3.2 Test condictions Min Typ. Max 70 280 1.3 Unit A A V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300µs, duty cycle 1.5% 5/16 Electrical characteristics STD70N03L - STD70N03L-1 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/16 STD70N03L - STD70N03L-1 Figure 7. Gate charge vs gate-source voltage Figure 8. Electrical characteristics Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized BVDSS vs temperature 7/16 Test circuit STD70N03L - STD70N03L-1 3 Test circuit Figure 14. Gate charge test circuit Figure 13. Switching times test circuit for resistive load Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 8/16 STD70N03L - STD70N03L-1 Power losses estimation Appendix A Power losses estimation Figure 19. Buck converter The power losses associated with the FETs in a synchronous buck converter can be estimated using the equations shown in the table below. The formulas give a good approximation, for the sake of performance comparison, of how different pairs of devices affect the converter efficiency. However a very important parameter, the wotking temperature, is not considered. The real device behavior is really dependent on how the heat generated inside the devices is removed to allow for a safer working junction temperature. The low side (SW2) device requires: ● ● ● ● ● Very low RDS(on) to reduce conduction losses Small Qgls to reduce the gate charge losses Small Coss to reduce losses due to output capacitance Small Qrr to reduce losses on SW1 during its turn-on The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to avoid the cross conduction phenomenon. Small Rg and Lg to allow higher gate current peak and to limit the voltage feedback on the gate Small Qg to have a faster commutation and to reduce gate charge losses Low RDS(on) to reduce the conduction losses The high side (SW1) device requires: ● ● ● 9/16 Power losses estimation STD70N03L - STD70N03L-1 High side switch (SW1) Low side switch (SW2) Pconduction R DS ( on ) • I L • δ 2 R DS ( on ) • I L • ( 1 – δ) 2 Pswitching IL V in • ( Q gsth ( SW1 ) + Q gd ( SW1 ) ) • f • --Ig Zero voltage switching Recovery Pdiode Conduction Not applicable 1 Vin • Q rr ( SW2 ) • f Not applicable V f ( SW2 ) • I L • t deadtime • f Pgate(Qg) Q g ( SW1 ) • V gg • f Q gls ( SW2 ) • V gg • f PQoss V in • Q oss ( SW1 ) • f ------------------------------------------------2 V in • Q oss ( SW2 ) • f ------------------------------------------------2 Parameter d Qgsth Qgls Pconduction Pswitching Pdiode Pgate PQoss Duty-cycle Post threshold gate charge Third quadrant gate charge On state losses On-off transition losses Meaning Conduction and reverse recovery diode losses Gate driver losses Output capacitance losses 10/16 STD70N03L - STD70N03L-1 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/16 Package mechanical data STD70N03L - STD70N03L-1 TO-251 (IPAK) MECHANICAL DATA DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033 H C A C2 L2 D B3 B6 A1 L = = 3 B5 B A3 = B2 = G = E L1 1 2 = 0068771-E 12/16 STD70N03L - STD70N03L-1 Package mechanical data DPAK MECHANICAL DATA mm. DIM. MIN. A A1 A2 B b4 C C2 D D1 E E1 e e1 H L (L1) L2 L4 R V2 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 5.1 6.4 4.7 2.28 4.4 9.35 1 2.8 0.8 0.6 0.2 0° 8° 0° 1 0.023 0.008 8° 4.6 10.1 0.173 0.368 0.039 0.110 0.031 0.039 6.6 0.252 0.185 0.090 0.181 0.397 TYP MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.200 0.260 TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 inch 0068772-F 13/16 Packaging mechanical data STD70N03L - STD70N03L-1 5 Packaging mechanical data DPAK FOOTPRINT All dimensions are in millimeters TAPE AND REEL SHIPMENT REEL MECHANICAL DATA DIM. A B C D G N T 1.5 12.8 20.2 16.4 50 22.4 18.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK QTY 2500 inch MIN. MAX. 12.992 TAPE MECHANICAL DATA DIM. A0 B0 B1 D D1 E F K0 P0 P1 P2 R W BASE QTY 2500 mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40 15.7 16.3 inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0




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