N-CHANNEL MOSFET

STD20NF06 N-CHANNEL 60V - 0.032 Ω - 24A DPAK STripFET™ II POWER MOSFET TYPE STD20NF06 ■ ■ ■ ■ VDSS 60 V RDS(on) < 0.040 Ω ID 24 A TYPICAL RDS(on) = 0.032 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION 3 1 DPAK TO-252 (Suffix “T4”) DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS ■ HIGH SWITCHING APPLICATIONS INTERNAL SCHEMATIC DIAGRAM Ordering Information SALES TYPE STD20NF06 MARKING D20NF06 PACKAGE TO-252 PACKAGING TAPE & REEL ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM(•) Ptot dv/dt (1) EAS(2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Operating Junction Temperature Value 60 60 ± 20 24 17 96 60 0.4 10 300 -55 to 175 (1) ISD ≤24A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (2) Starting Tj = 25 oC, ID =10 A, VDD = 45V Unit V V V A A A W W/°C V/ns mJ °C (•) Pulse width limited by safe operating area. June 2004 Rev.3.0.6 1/10 STD20NF06 TAB.1 THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose (1.6 mm from case, for 10 sec) Max Max 2.5 100 275 °C/W °C/W °C ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) TAB.2 OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125°C VGS = ± 20V Min. 60 1 10 ±100 Typ. Max. Unit V µA µA nA TAB.3 ON (*) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V ID = 250 µA ID = 12 A Min. 2 0.032 Typ. Max. 4 0.040 Unit V Ω TAB.4 DYNAMIC Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 25 V ID = 12 A Min. Typ. 15 690 170 68 Max. Unit S pF pF pF VDS = 25V f = 1 MHz VGS = 0 2/10 STD20NF06 ELECTRICAL CHARACTERISTICS (continued) TAB.5 SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions ID = 10 A VDD = 30 V VGS = 10 V RG = 4.7 Ω (Resistive Load, Figure 3) VDD= 30 V ID= 20 A VGS= 10 V Min. Typ. 10 30 23 5 7.5 31 Max. Unit ns ns nC nC nC TAB.6 SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions VDD = 30 V ID = 10 A VGS = 10 V RG = 4.7Ω, (Resistive Load, Figure 3) Min. Typ. 30 8 Max. Unit ns ns TAB.7 SOURCE DRAIN DIODE Symbol ISD ISDM (•) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current 1.5 %. Test Conditions Min. Typ. Max. 24 96 Unit A A V ns nC A ISD = 24 A VGS = 0 65 150 4.6 1.5 ISD = 20 A di/dt = 100A/µs Tj = 150°C VDD = 30 V (see test circuit, Figure 5) (*)Pulsed: Pulse duration = 300 µs, duty cycle (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/10 STD20NF06 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/10 STD20NF06 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage Temperature. . . 5/10 STD20NF06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/10 STD20NF06 TO-252 (DPAK) MECHANICAL DATA mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 0.6 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 6.4 4.4 9.35 0.8 1 0.023 TYP. MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 6.6 4.6 10.1 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.252 0.173 0.368 0.031 0.039 inch TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 0.260 0.181 0.397 DIM. H A C2 C DETAIL "A" A1 L2 D DETAIL "A" B = = 3 B2 = = G E 2 L4 1 = = A2 0068772-B 7/10 STD20NF06 *on sales type 8/10 STD20NF06 Revision History Date Friday 11 June 2004 Revision 3.0.6 Missing in the web Description of Changes 9/10 STD20NF06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners. © 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco -Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. www.st.com 10/10