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Part Number |
STB3020L |
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Manufacturer |
ST Microelectronics |
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Semiconductor DataSheet |
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DataSheet View |
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STB3020L
N - CHANNEL 30V - 0.019Ω - 40A - D2PAK STripFET™ POWER MOSFET
TYPE ST B3020L
s s s
V DSS 30 V
R DS(on) < 0.022 Ω
ID 40 A
s
s
TYPICAL RDS(on) = 0.019 Ω LOW GATE CHARGE A 100oC APPLICATION ORIENTED CHARACTERIZATION FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL
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DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique ”Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-AC & DC-AC CONVERTERS IN HIGH PERFORMANCE VRMs s AUTOMOTIVE ENVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc.) ABSOLUTE MAXIMUM RATINGS
Symb ol V DS V DGR V GS ID ID I DM (•) P tot T s tg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 kΩ) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Storage T emperature Max. O perating Junct ion T emperature
o o o
D2PAK TO-263 (suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
Value 30 30 ± 20 40 28 160 80 0.53 -65 to 175 175
Unit V V V A A A W W /o C
o o
C C
(•) Pulse width limited by safe operating area
March 1999
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THERMAL DATA
R thj -case
Rthj -amb
R thc-sink Tl
Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose
1.875 62.5 0.5 300
C/W oC/W o C/W o C
o
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 Min. 30 1 10 ± 100 Typ. Max. Unit V µA µA nA
V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = ± 20 V
T c = 125 oC
ON (∗)
Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10V V GS = 5V Test Con ditions ID = 250 µA ID = 20 A ID = 20 A 40 Min. 1 0.019 0.033 Typ. Max. 2.5 0.022 0.038 Unit V Ω Ω A
V DS > ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s (∗) C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D =20 A V GS = 0 Min. 5 Typ. 20 1270 350 115 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 15 V I D = 19 A R G = 4.7 Ω V GS = 4.5 V (Resistive Load, see fig. 3) V DD = 24 V ID = 38 A V GS = 5 V Min. Typ. 28 220 21 9 11 29 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbo l t d(of f) tf tr (Voff) tf tc Parameter Turn-off Delay T ime Fall T ime Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 15 V I D = 19 A V GS = 4.5 V R G = 4.7 Ω (Resistive Load, see fig. 3) V DD = 24 V I D = 38 A V GS = 4.5 V R G = 4.7 Ω (Induct ive Load, see fig. 5) Min. Typ. 45 35 30 85 125 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (•) V SD (∗) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 40 A V GS = 0 45 60 2.5 I SD = 38 A di/dt = 100 A/µs T j = 150 o C V DD = 15 V (see test circuit, fig. 5) Test Con ditions Min. Typ. Max. 40 160 1.5 Unit A A V ns nC A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
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Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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TO-263 (D2PAK) MECHANICAL DATA
mm MIN. A A1 B B2 C C2 D E G L L2 L3 4.4 2.49 0.7 1.14 0.45 1.21 8.95 10 4.88 15 1.27 1.4 TYP. MAX. 4.6 2.69 0.93 1.7 0.6 1.36 9.35 10.4 5.28 15.85 1.4 1.75 MIN. 0.173 0.098 0.027 0.044 0.017 0.047 0.352 0.393 0.192 0.590 0.050 0.055 inch TYP. MAX. 0.181 0.106 0.036 0.067 0.023 0.053 0.368 0.409 0.208 0.624 0.055 0.068
DIM.
D A C A2 DETAIL ”A” A1 B2 B G
C2
DETAIL”A”
E
L2
L
L3
P011P6/E
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Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysi - Malta - Mexico - Morocco - The Netherlands a Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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