N-CHANNEL POWER MOSFET

STP14NK50Z - STP14NK50ZFP STB14NK50Z-STB14NK50Z-1-STW14NK50Z N-channel 500V - 0.34Ω - 14A TO-220/FP/D2PAK/I2PAK/TO-247 Zener-protected SuperMESHTM Power MOSFET General features Type STP14NK50Z STP14NK50ZFP STB14NK50Z STB14NK50Z-1 STW14NK50Z ■ ■ ■ ■ ■ VDSS 500V 500V 500V 500V 500V RDS(on) <0.38Ω <0.38Ω <0.38Ω <0.38Ω <0.38Ω ID 14A 14A 14A 14A 14A Pw 150W 1 3 2 3 1 2 35W 150W 150W 150W TO-220 TO-220FP TO-247 3 12 3 1 Extremely high dv/dt capability 100% avalanche tested Gate charge minimized Very low intrinsic capacitances Very good manufacturing repeatibility I2PAK D2PAK Internal schematic diagram www.DataSheet4U.com Description The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products. Applications ■ Switching application Order codes Part number STP14NK50Z STP14NK50ZFP STB14NK50ZT4 STB14NK50Z-1 STW14NK50Z Marking P14NK50Z P14NK50ZFP B14NK50Z B14NK50Z W14NK50Z Package TO-220 TO-220FP D PAK I PAK TO-247 2 2 Packaging Tube Tube Tape & reel Tube Tube July 2006 Rev 3 1/19 www.st.com 19 Contents STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Electrical characteristics (curves) ............................. 7 3 4 5 6 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Value Symbol Parameter TO-220 I2PAK/D2PAK VDS VDGR VGS ID ID IDM(2) PTOT Drain-source voltage (VGS = 0) Drain-gate voltage (RGS = 20KΩ) Gate-source voltage Drain current (continuous) at TC = 25°C Drain current (continuous) at TC=100°C Drain current (pulsed) Total dissipation at TC = 25°C Derating factor Vesd(G-S) G-S ESD (HBM C=100pF, R=1.5kΩ) dv/dt (3) Unit TO-220FP 500 500 ± 30 TO-247 V V V 14 7.6 48 150 1.20 A A A W W/°C KV V/ns V °C 14 7.6 48 150 1.20 14(1) 7.6(1) 48(1) 35 0.28 4000 4.5 Peak diode recovery voltage slope Insulation withstand voltage (DC) Operating junction temperature Storage temperature -- VISO TJ Tstg 2500 -55 to 150 1. Limited only by maximum temperature allowed 2. Pulse width limited by safe operating area 3. ISD ≤ 13A, di/dt ≤ 200A/µs,VDD ≤V(BR)DSS, Tj ≤TJMAX Table 2. Thermal data Value Symbol Parameter TO-220 I2PAK D2PAK Unit TO-220FP TO-247 °C/ W °C/ W 50 300 °C/ W °C Rthj-case Rthj-pcb Rthj-a Tl Thermal resistance junction-case Max Thermal resistance junction-pcb Max (1) 0.83 60 62.5 3.6 0.83 Thermal resistance junction-ambient Max Maximum lead temperature for soldering purpose 1. When mounted on minimum footprint 3/19 Electrical ratings STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Table 3. Symbol IAR EAS Avalanche characteristics Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) Single pulse avalanche energy (starting Tj=25°C, Id=Iar, Vdd=50V) Value 12 400 Unit A mJ Table 4. Symbol BVGSO Gate-source zener diode Parameter Gate-source breakdown voltage Test conditions Igs=±1mA (Open Drain) Min. 30 Typ. Max. Unit V 1.1 Protection features og gate-to-source zener diodes The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 4/19 STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Electrical charac- 2 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. Symbol V(BR)DSS On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 1mA, VGS= 0 VDS = Max rating, VDS = Max rating, TC =125°C VGS = ±20V VDS= VGS, ID = 100µA VGS= 10V, ID= 6A 3 3.75 0.34 Min. 500 1 50 ±10 Typ. Max. Unit V µA µA nA V Ω IDSS IGSS VGS(th) RDS(on) 4.5 0.38 Table 6. Symbol gfs (1) Ciss Coss Crss Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Test conditions VDS =8V, ID = 6A Min. Typ. 12 2000 238 55 150 69 12 31 92 Max. Unit S pF pF pF pF nC nC nC VDS =25V, f=1 MHz, VGS=0 Coss eq(2). Equivalent output capacitance Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VGS=0, VDS =0V to 400V VDD=400V, ID = 12A VGS =10V 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS inceases from 0 to 80% VDSS Table 7. Symbol td(on) tr Switching times Parameter Turn-on delay time Rise time Test conditions VDD=250 V, ID=6A, RG=4.7Ω, VGS=10V (see Figure 19) Min. Typ. 24 16 Max. Unit ns ns 5/19 Electrical characteristics Table 7. td(off) tf tr(Voff) tf tc STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - Switching times Turn-off delay time Fall time Off-voltage rise time Fall time Cross-over time VDD=250V, ID=6A, RG=4.7Ω, VGS=10V (see Figure 19) VDD=400 V, ID=12A, RG=4.7Ω, VGS=10V (see Figure 21) 54 12 9.5 9 20 ns ns ns ns ns Table 8. Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=12A, VGS=0 ISD=12A, di/dt = 100A/µs, VDD=35V, Tj=150°C (see Figure 21) 470 3.1 13.2 Test conditions Min Typ. Max 12 48 1.6 Unit A A V ns µC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% 6/19 STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Electrical charac- 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Safe operating area for TO-220FP Figure 4. Thermal impedance for TO-220FP Figure 5. Safe operating area for TO-247 Figure 6. Thermal impedance for TO-247 7/19 Electrical characteristics Figure 7. STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 Figure 8. Transfer characteristics Output characterisics Figure 9. Transconductance Figure 10. Static drain-source on resistance Figure 11. Gate charge vs gate-source voltage Figure 12. Capacitance variations 8/19 STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Electrical characFigure 13. Normalized gate threshold voltage vs temperature Figure 14. Normalized on resistance vs temperature Figure 15. Source-drain diode forward characteristics Figure 16. Normalized BVDSS vs temperature Figure 17. Normalized BVgso vs temperature Figure 18. Maximum avalanche energy vs temperature 9/19 Test circuit STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z 3 Test circuit Figure 20. Gate charge test circuit Figure 19. Switching times test circuit for resistive load Figure 21. Test circuit for inductive load Figure 22. Unclamped Inductive load test switching and diode recovery times circuit Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform 10/19 STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Package mechani- 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/19 Package mechanical data STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - TO-220 MECHANICAL DATA DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154 øP Q 12/19 STP14NK50Z - STP14NK50ZFP - STB14NK50Z - STB14NK50Z-1 - STW14NK50Z Package mechani- TO-220FP MECHANICAL DATA mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409 DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 Ø A B L3 L6 L7 F1 F D G1 H F2 L2 L5 E 123 L4 G 13/19 Package mechanical