DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

www.DataSheet4U.com SN54HCT139, SN74HCT139 DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS SCLS066D − MARCH 1982 − REVISED SEPTEMBER 2003 D D D D D D D D D Operating Voltage Range of 4.5 V to 5.5 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 10 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception SN54HCT139 . . . J OR W PACKAGE SN74HCT139 . . . D, DB, N, OR PW PACKAGE (TOP VIEW) 1G 1A 1B 1Y0 1Y1 1Y2 1Y3 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC 2G 2A 2B 2Y0 2Y1 2Y2 2Y3 SN54HCT139 . . . FK PACKAGE (TOP VIEW) The ’HCT139 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay time of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. ORDERING INFORMATION TA PDIP − N PACKAGE† Tube of 25 Tube of 40 SOIC − D −40 C 85°C −40°C to 85 C SSOP − DB TSSOP − PW CDIP − J −55 C 125°C −55°C to 125 C CFP − W LCCC − FK Reel of 2500 Reel of 250 Reel of 2000 Reel of 2000 Reel of 250 Tube of 25 Tube of 150 Tube of 55 1A 1G NC VCC 2G 1B 1Y0 NC 1Y1 1Y2 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13 description/ordering information 2A 2B NC 2Y0 2Y1 NC − No internal connection ORDERABLE PART NUMBER SN74HCT139N SN74HCT139D SN74HCT139DR SN74HCT139DT SN74HCT139DBR SN74HCT139PWR SN74HCT139PWT SNJ54HCT139J SNJ54HCT139W SNJ54HCT139FK SNJ54HCT139FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 Copyright  2003, Texas Instruments Incorporated • DALLAS, TEXAS 75265 1Y3 GND NC 2Y3 2Y2 TOP-SIDE MARKING SN74HCT139N HCT139 HT139 HT139 SNJ54HCT139J SNJ54HCT139W 1 www.DataSheet4U.com SN54HCT139, SN74HCT139 DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS description/ordering information (continued) The ’HCT139 devices comprise two individual 2-line to 4-line decoders in a single package. The active-low enable (G) input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit. FUNCTION TABLE INPUTS SELECT G H L L L L B X L L H H A X L H L H Y0 H L H H H OUTPUTS Y1 H H L H H Y2 H H H L H Y3 H H H H L SCLS066D − MARCH 1982 − REVISED SEPTEMBER 2003 logic diagram (positive logic) 4 1Y0 1G 1 5 1Y1 6 2 1A 7 1B 3 1Y2 1Y3 12 2Y0 15 2G 11 2Y1 10 2Y2 2A 2B Pin numbers shown are for the D, DB, J, N, PW, and W packages. 14 13 9 2Y3 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 www.DataSheet4U.com SN54HCT139, SN74HCT139 DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS SCLS066D − MARCH 1982 − REVISED SEPTEMBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN54HCT139 MIN VCC VIH VIL VI VO tt Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V 4.5 2 0.8 0 0 VCC VCC 500 0 0 NOM 5 MAX 5.5 SN74HCT139 MIN 4.5 2 0.8 VCC VCC 500 NOM 5 MAX 5.5 UNIT V V V V V ns TA Operating free-air temperature −55 125 −40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL II ICC ∆ICC‡ Ci TEST CONDITIONS VI = VIH or VIL VI = VIH or VIL VI = VCC or 0 VI = VCC or 0, IOH = −20 µA IOH = −4 mA IOL = 20 µA IOL = 4 mA VCC 4.5 V 4.5 V 5.5 V 5.5 V 5.5 V 4.5 V to 5.5 V 1.4 3 TA = 25°C MIN TYP MAX 4.4 3.98 4.499 4.3 0.001 0.17 ±0.1 0.1 0.26 ±100 8 2.4 10 SN54HCT139 MIN 4.4 3.7 0.1 0.4 ±1000 160 3 10 MAX SN74HCT139 MIN 4.4 3.84 0.1 0.33 ±1000 80 2.9 10 V nA µA mA pF V MAX UNIT IO = 0 One input at 0.5 V or 2.4 V, Other inputs at 0 or VCC ‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 www.DataSheet4U.com SN54HCT139, SN74HCT139 DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) A or B tpd G tt Y Y TO (OUTPUT) Y VCC 4.5 V 5.5 V 4.5 V 5.5 V 4.5 V 5.5 V MIN TA = 25°C TYP MAX 14 12 11 10 8 6 34 30 34 30 15 14 SN54HCT139 MIN MAX 51 50 51 50 22 21 SN74HCT139 MIN MAX 43 40 43 40 19 17 ns ns UNIT SCLS066D − MARCH 1982 − REVISED SEPTEMBER 2003 operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance per decoder TEST CONDITIONS No load TYP 25 UNIT pF PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point CL = 50 pF (see Note A) In-Phase Output 3V Input 1.3 V tPLH 1.3 V 10% tPHL Out-of-Phase Output 90% 1.3 V 10% tf 90% tr Input 1.3 V 0.3 V 2.7 V 2.7 V 3V 1.3 V 0.3 V 0 V tf tPLH 1.3 V 10% 90% tr VOH VOL 1.3 V 0V tPHL 90% VOH 1.3 V 10% V OL tf LOAD CIRCUIT tr VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 www.DataSheet4U.com www.ti.com PACKAGE OPTION ADDENDUM 6-Dec-2006 PACKAGING INFORMATION Orderable Device SN74HCT139D SN74HCT139DBLE SN74HCT139DBR SN74HCT139DBRE4 SN74HCT139DE4 SN74HCT139DR SN74HCT139DRE4 SN74HCT139DT SN74HCT139DTE4 SN74HCT139N SN74HCT139NE4 SN74HCT139PWLE SN74HCT139PWR SN74HCT139PWRE4 SN74HCT139PWT SN74HCT139PWTE4 (1) Status (1) ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE Package Type SOIC SSOP SSOP SSOP SOIC SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP TSSOP Package Drawing D DB DB DB D D D D D N N PW PW PW PW PW Pins Package Eco Plan (2) Qty 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 40 Green (RoHS & no Sb/Br) TBD 2000 Green (RoHS &