8-BIT MAGNITUDE COMPARATORS

www.DataSheet4U.com SN54HC682, SN74HC682 8-BIT MAGNITUDE COMPARATORS SCLS018D – MARCH 1984 – REVISED MARCH 2003 D D D Wide Operating Voltage Range of 2 V to 6 V High-Current Outputs Drive Up To 10 LSTTL Loads Typical tpd = 22 ns SN54HC682 . . . J OR W PACKAGE SN74HC682 . . . DW OR N PACKAGE (TOP VIEW) D D D ±4-mA Output Drive at 5 V Compare Two 8-Bit Words 100-kΩ Pullup Resistors Are on the Q Inputs SN54HC682 . . . FK PACKAGE (TOP VIEW) 10 11 description/ordering information These magnitude comparators perform comparisons of two 8-bit binary or BCD words. The ’HC682 devices feature 100-kΩ pullup termination resistors on the Q inputs for analog or switch data. ORDERING INFORMATION TA PDIP – N –40°C to 85°C SOIC – DW CDIP – J –55°C to 125°C CFP – W LCCC – FK PACKAGE† Tube Tube Tape and reel Tube Tube Tube ORDERABLE PART NUMBER SN74HC682N SN74HC682DW SN74HC682DWR SNJ54HC682J SNJ54HC682W SNJ54HC682FK TOP-SIDE MARKING SN74HC682N HC682 SNJ54HC682J SNJ54HC682W SNJ54HC682FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE DATA INPUTS P, Q P=Q P>Q PQ H L H The P < Q function can be generated by applying P = Q and P > Q to a 2-input NAND gate. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Q3 GND P4 Q4 P5 P>Q P0 Q0 P1 Q1 P2 Q2 P3 Q3 GND 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 VCC P=Q Q7 P7 Q6 P6 Q5 P5 Q4 P4 Q0 P0 P>Q VCC P=Q P1 Q1 P2 Q2 P3 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13 Q7 P7 Q6 P6 Q5 1 www.DataSheet4U.com SN54HC682, SN74HC682 8-BIT MAGNITUDE COMPARATORS logic diagram (positive logic) SCLS018D – MARCH 1984 – REVISED MARCH 2003 19 2 P=Q P0 Q0 P1 3 4 Q1 P2 5 6 Q2 P3 7 8 Q3 P4 9 11 Q4 P5 12 13 1 P>Q Q5 P6 14 15 Q6 P7 16 17 Q7 18 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 www.DataSheet4U.com SN54HC682, SN74HC682 8-BIT MAGNITUDE COMPARATORS SCLS018D – MARCH 1984 – REVISED MARCH 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN54HC682 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 4.5 V VCC = 6 V 0 0 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 400 0 0 NOM 5 MAX 6 SN74HC682 MIN 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 400 ns V V V V NOM 5 MAX 6 UNIT V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 www.DataSheet4U.com SN54HC682, SN74HC682 8-BIT MAGNITUDE COMPARATORS electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC 2V IOH = –20 µA VOH VI = VIH or VIL IOH = –4 mA IOH = –5.2 mA IOL = 20 µA VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA IIH IIL ICC Ci VI = VCC VI = 0 VI = VCC or 0, Q inputs All other inputs IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 6V 6V 2 V to 6 V MIN 1.9 4.4 5.9 3.98 5.48 TA = 25°C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 0.1 –50 –0.1 480 3 0.1 0.1 0.1 0.26 0.26 100 –90 –100 700 10 SN54HC682 MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1000 –160 –1000 1300 10 MAX SN74HC682 MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1000 –140 –1000 1100 10 nA µA nA µA pF V V MAX UNIT SCLS018D – MARCH 1984 – REVISED MARCH 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V tpd P or Q Any 4.5 V 6V 2V tt Any 4.5 V 6V MIN TA = 25°C TYP MAX 130 26 22 38 8 6 275 55 47 75 15 13 SN54HC682 MIN MAX 413 88 70 110 22 19 SN74HC682 MIN MAX 344 69 58 95 19 16 ns ns UNIT operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS No load TYP 40 UNIT pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 www.DataSheet4U.com SN54HC682, SN74HC682 8-BIT MAGNITUDE COMPARATORS SCLS018D – MARCH 1984 – REVISED MARCH 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point CL = 50 pF (see Note A) In-Phase Output Input VCC 50% tPLH 50% 10% tPHL Out-of-Phase Output 90% 50% 10% tf 90% tr Input 50% 10% 90% 90% VCC 50% 10% 0 V tf tPLH 50% 10% 90% tr 50% 0V tPHL 90% VOH 50% 10% VOL tf VOH VOL LOAD CIRCUIT tr VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 5-Sep-2005 PACKAGING INFORMATION Orderable Device SN74HC682DW SN74HC682DWE4 SN74HC682DWR SN74HC682N SN74HC682NE4 (1) Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type SOIC SOIC SOIC PDIP PDIP Package Drawing DW DW DW N N Pins Package Eco Plan (2) Qty 20 20 20 20 20 25 25 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-NC-NC-NC Level-NC-NC-NC 2000 Green (RoHS & no Sb/Br) 20 20 Pb-Free (RoHS) Pb-Free (RoHS) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Br