8-BIT DUAL-SUPPLY BUS TRANSCEIVER

SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A – JUNE 2005 – REVISED AUGUST 2005 FEATURES • • • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage VCC Isolation Feature – If Either VCC Input Is at GND, All Are in the High-Impedance State Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range DB, DBQ, DGV, OR PW PACKAGE (TOP VIEW) • • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 4000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) RHL PACKAGE (TOP VIEW) VCCA 1 VCCA DIR A1 A2 A3 A4 A5 A6 A7 A8 GND GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCCB VCCB OE B1 B2 B3 B4 B5 B6 B7 B8 GND 24 23 VCCB 22 OE 21 B1 20 B2 19 B3 18 B4 17 B5 16 B6 15 B7 14 B8 DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 2 3 4 5 6 7 8 9 10 11 12 13 GND DESCRIPTION/ORDERING INFORMATION This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74LVC8T245 is optimized to operate with VCCA and VCCB set at 1.65 V to 5.5 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes. ORDERING INFORMATION TA QFN – RHL SSOP – DBR –40°C to 85°C SSOP (QSOP) – DBQ TSSOP – PW TVSOP – DGV (1) PACKAGE (1) Tape and reel Tape and reel Tape and reel Tube Tape and reel Tape and reel ORDERABLE PART NUMBER SN74LVC8T245RHLR SN74LVC8T245DBR SN74LVC8T245DBQR SN74LVC8T245PW SN74LVC8T245PWR SN74LVC8T245DGVR TOP-SIDE MARKING NH245 NH245 NH245 NH245 NH245 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated GND VCCB SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES584A – JUNE 2005 – REVISED AUGUST 2005 www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) The SN74LVC8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ. The SN74LVC8T245 is designed so that the control pins (DIR and OE) are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, all outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (1) (EACH 8-BIT SECTION) CONTROL INPUTS OE L L H (1) DIR L H X OUTPUT CIRCUITS A PORT Enabled Hi-Z Hi-Z B PORT Hi-Z Enabled Hi-Z OPERATION B data to A bus A data to B bus Isolation Input circuits of the data I/Os are always active. LOGIC DIAGRAM (POSITIVE LOGIC) DIR 2 22 OE 3 A1 21 B1 To Seven Other Channels 2 www.ti.com SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES584A – JUNE 2005 – REVISED AUGUST 2005 (1) Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) MIN VCCA VCCB VI Supply voltage range I/O ports (A port) Input voltage range (2) I/O ports (B port) Control inputs VO VO IIK IOK IO Voltage range applied to any output in the high-impedance or power-off state (2) Voltage range applied to any output in the high or low state (2) (3) Input clamp current Output clamp current Continuous output current Continuous current through each VCCA, VCCB, and GND DB package DBQ package θJA Package thermal impedance (4) DGV package PW package RHL package Tstg (1) (2) (3) (4) Storage temperature range –65 A port B port A port B port VI < 0 VO < 0 –0.5 –0.5 –0.5 –0.5 –0.5 –0.5 MAX 6.5 6.5 6.5 6.5 6.5 6.5 V V mA mA mA mA V UNIT V –0.5 VCCA + 0.5 –0.5 VCCB + 0.5 –50 –50 ±50 ±100 63 61 86 88 43 150 °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51-7. 3 SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES584A – JUNE 2005 – REVISED AUGUST 2005 www.ti.com Recommended Operating Conditions (1) (2) (3) (4) VCCI VCCA VCCB Supply voltage 1.65 V to 1.95 V VIH High-level input voltage Data inputs (5) 2.3 V to 2.7 V 3 V to 3.6 V 4.5 V to 5.5 V 1.65 V to 1.95 V VIL Low-level input voltage Data inputs (5) 2.3 V to 2.7 V 3 V to 3.6 V 4.5 V to 5.5 V 1.65 V to 1.95 V VIH High-level input voltage Control inputs (referenced to VCCA) (6) 2.3 V to 2.7 V 3 V to 3.6 V 4.5 V to 5.5 V 1.65 V to 1.95 V VIL Low-level input voltage Control inputs (referenced to VCCA) (6) Control inputs Active state 3-State 1.65 V to 1.95 V IOH High-level output current 2.3 V to 2.7 V 3 V to 3.6 V 4.5 V to 5.5 V 1.65 V to 1.95 V IOL Low-level output current 2.3 V to 2.7 V 3 V to 3.6 V 4.5 V to 5.5 V 1.65 V to 1.95 V ∆t/∆v Input transition rise or fall rate Data inputs 2.3 V to 2.7 V 3 V to 3.6 V 4.5 V to 5.5 V TA (1) (2) (3) (4) (5) (6) Operating free-air temperature –40 2.3 V to 2.7 V 3 V to 3.6 V 4.5 V to 5.5 V VI VI/O Input voltage Input/output voltage 0 0 0 VCCA × 0.65 1.7 2 VCCA × 0.7 VCCA × 0.35 0.7 0.8 VCCA × 0.3 5.5 VCCO 5.5 –4 –8 –24 –32 4 8 24 32 20 20 10 5 85 °C ns/V mA mA V V V V V VCCO MIN 1.65 1.65 VCCI × 0.65 1.7 2 VCCI × 0.7 VCCI × 0.35 0.7 0.8 VCCI × 0.3 V V MAX 5.5 5.5 UNIT V VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably VCCI or GND) to ensure proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. All unused control inputs must be held at VCCA or GND to ensure proper device operation and minimize power comsumption. For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V. For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V. 4 www.ti.com SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES584A – JUNE 2005 – REVISED AUGUST 2005 (1) (2) Electrical Characteristics PARAMETER over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS IOH = –100 µA, IOH = –4 mA, VOH IOH = –8 mA, IOH = –24 mA, IOH = –32 mA, IOL = 100 µA, IOL = 4 mA, VOL IOL = 8 mA, IOL = 24 mA, IOL = 32 mA, II Ioff IOZ DIR A or B port A or B port VI = VCCA or GND VI or VO = 0 to 5.5 V VO = VCCO or GND, OE = VIH VI = VCCI or GND, IO = 0 VI = VIH VI = VIH VI = VIH VI = VIH VI = VIH VI = VIL VI = VIL VI = VIL VI = VIL VI = VIL VCCA 1.65 V to 4.5 V 1.65 V 2.3 V 3V 4.5 V 1.65 V to 4.5 V 1.65 V 2.3 V 3V 4.5 V 1.65 V to 5.5 V 0V 0 to 5.5 V 1.65 V to 5.5 V 1.65 V to 5.5 V ICCA 5V 0V 1.65 V to 5.5 V ICCB ICCA + ICCB A port ∆ICCA DIR ∆ICCB Ci Cio (1) (2) B port Control inputs A or B port VI = VCCI or GND, VI = VCCI or GND, IO = 0 IO = 0 5V 0V 1.65 V to 5.5 V One A port at VCCA – 0.6 V, DIR at VCCA, B port = open DIR at VCCA – 0.6 V, B port = open, A port at VCCA or GND One B port at VCCB – 0.6 V, DIR at GND, A port = open VI = VCCA or GND VO = VCCA/B or GND 3 V to 5.5 V 3 V to 5.5 V 50 3 V to 5.5 V 3.3 V 3.3 V 3 V to 5.5 V 3.3 V 3.3 V 4 8.5 50 5 10 µA pF pF VCCB 1.65 V to 4.5 V 1.65 V 2.3 V 3V 4.5 V 1.65 V to 4.5 V 1.65 V 2.3 V 3V 4.5 V 1.65 V to 5.5 V 0 to 5.5 V 0V 1.65 V to 5.5 V 1.65 V to 5.5 V 0V 5V 1.65 V to 5.5 V 0V 5V 1.65 V to 5.5 V ±1 ±1 ±1 ±1 MIN TYP MAX MIN MAX VCCO – 0.1 1.2 1.9 2.4 3.8 0.1 0.45 0.3 0.55 0.55 ±2 ±2 ±2 ±2 15 15 –2 15 –2 15 25 50 µA µA µA µA µA µA µA V V UNIT VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. 5 SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRA