SINGLE BILATERAL ANALOG SWITCH

www.DataSheet4U.com SN74LVC1G66 Q1 SINGLE BILATERAL ANALOG SWITCH SCES499B − OCTOBER 2003 − REVISED JANUARY 2005 D Qualification in Accordance With D D D D D D AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) 1.65-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V High On-Off Output Voltage Ratio D High Degree of Linearity D High Speed, Typically 0.5 ns D Low On-State Resistance, Typically ≈5.5 Ω D (VCC = 4.5 V) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II DBV or DCK PACKAGE (TOP VIEW) (VCC = 3 V, CL = 50 pF) † Contact factory for details. Q100 qualification data available on request. A B GND 1 2 3 5 4 VCC C description/ordering information This single analog switch is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G66 can handle both analog and digital signals. The device permits signals with amplitudes of up to 5.5 V (peak) to be transmitted in either direction. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION TA −40°C to 125°C PACKAGE‡ SOT (SOT-23) − DBV Reel of 2875 ORDERABLE PART NUMBER 1P1G66QDBVRQ1 TOP-SIDE MARKING§ C66_ SOT (SOT-70) − DCK Reel of 2875 1P1G66QDCKRQ1 C6_ ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. § DBV: The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE CONTROL INPUT (C) L H SWITCH OFF ON logic diagram (positive logic) 1 A 4 C 2 B Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2005, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74LVC1G66 Q1 SINGLE BILATERAL ANALOG SWITCH SCES499B − OCTOBER 2003 − REVISED JANUARY 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Input voltage range, VI (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Switch I/O voltage range, VI/O (see Notes 1, 2, and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Control input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA I/O port diode current, IIOK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA On-state switch current, IT (VI/O = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to ground, unless otherwise specified. 2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. This value is limited to 5.5 V maximum. 4. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 5) MIN VCC VI/O Supply voltage I/O port voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 1.65 0 VCC × 0.65 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.35 VCC × 0.3 VCC × 0.3 VCC × 0.3 5.5 20 20 10 10 ns/V MAX 5.5 VCC UNIT V V VIH High-level input voltage, control input V VIL Low-level input voltage, control input V VI Control input voltage V ∆t/∆v Input transition rise/fall time TA Operating free-air temperature −40 125 °C NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74LVC1G66 Q1 SINGLE BILATERAL ANALOG SWITCH SCES499B − OCTOBER 2003 − REVISED JANUARY 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VI = VCC or GND, VC = VIH (see Figure 1) IS = 4 mA IS = 8 mA IS = 16 mA IS = 16 mA IS = 4 mA IS = 8 mA IS = 16 mA IS = 16 mA VCC 1.65 V 2.3 V 3V 4.5 V 1.65 V 2.3 V 3V 4.5 V 5.5 V MIN TYP† 12 9 9 5.5 74.5 20 12.5 7.5 MAX 35 30 30 25 165 60 35 25 ±1 ±0.1† ±1 ±0.1† ±1 ±0.1† 10 1† 500 2 6 13 µA A Ω Ω UNIT ron On-state switch resistance ron(p) Peak on resistance VI = VCC to GND, VC = VIH (see Figure 1) IS(off) Off-state switch leakage current VI = VCC and VO = GND or VI = GND and VO = VCC, VC = VIL (see Figure 2) VI = VCC or GND, VC = VIH, VO = Open (see Figure 3) VC = VCC or GND VC = VCC or GND VC = VCC − 0.6 V IS(on) II ICC ∆ICC Cic Cio(off) On-state switch leakage current Control input current Supply current Supply current change Control input capacitance Switch input/output capacitance 5.5 V 5.5 V 5.5 V 5.5 V 5V 5V 5V µA A µA A µA A µA pF pF pF Cio(on) Switch input/output capacitance † TA = 25°C switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 4) PARAMETER tpd‡ ten§ FROM (INPUT) A or B C TO (OUTPUT) B or A A or B 2.5 VCC = 1.8 V ± 0.15 V MIN MAX 5.5 14 1.9 VCC = 2.5 V ± 0.2 V MIN MAX 3.2 9.5 1.8 VCC = 3.3 V ± 0.3 V MIN MAX 2.8 8 1.5 VCC = 5 V ± 0.5 V MIN MAX 2.6 7.2 ns ns UNIT tdis¶ C A or B 2.2 12 1.4 8.9 2 8.4 1.4 6.9 ns ‡ tPLH and tPHL are the same as tpd. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). § tPZL and tPZH are the same as ten. ¶ tPLZ and tPHZ are the same as tdis. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74LVC1G66 Q1 SINGLE BILATERAL ANALOG SWITCH SCES499B − OCTOBER 2003 − REVISED JANUARY 2005 analog switch characteristics, TA = 25°C PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS VCC 1.65 V CL = 50 pF, RL = 600 Ω, fin = sine wave (see Figure 5) Frequency response† (switch ON) A or B B or A CL = 5 pF, RL = 50 Ω, fin = sine wave (see Figure 5) 2.3 V 3V 4.5 V 1.65 V 2.3 V 3V 4.5 V 1.65 V Crosstalk (control input to signal output) C A or B CL = 50 pF, RL = 600 Ω, fin = 1 MHz (square wave) (see Figure 6) 2.3 V 3V 4.5 V 1.65 V CL = 50 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (see Figure 7) Feedthrough attenuation‡ (switch OFF) A or B B or A CL = 5 pF, RL = 50 Ω, fin = 1 MHz (sine wave) (see Figure 7) 2.3 V 3V 4.5 V 1.65 V 2.3 V 3V 4.5 V 1.65 V CL = 50 pF, RL = 10 k , kΩ, fin = 1 kHz (sine wave) (see Figure 8) Sine-wave distortion A or B B or A CL = 50 pF, RL = 10 k , kΩ, fin = 10 kHz (sine wave) (see Figure 8) † Adjust fin voltage to obtain 0 dBm at output. Increase fin frequency until dB meter reads −3 dB. ‡ Adjust fin voltage to obtain 0 dBm at input. 2.3 V 3V 4.5 V 1.65 V 2.3 V 3V 4.5 V TYP 35 120 175 195 >300 >300 >300 >300 35 50 70 100 −58 −58 −58 −58 −42 −42 −42 −42 0.1 0.025 0.015 0.01 0.15 0.025 0.015 0.01 % dB mV MHz UNIT operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS f = 10 MHz VCC = 1.8 V TYP 8 VCC = 2.5 V TYP 9 VCC = 3.3 V TYP 9 VCC = 5 V TYP 11 UNIT pF 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74LVC1G66 Q1 SINGLE BILATERAL ANALOG SWITCH SCES499B − OCTOBER 2003 − REVISED JANUARY 2005 PARAMETER MEASUREMENT INFORMATION VCC VCC VI = VCC or GND A or B B or A VO VIH C VC (ON) GND IS r on + VI − VO VI * VO W IS V Figure 1. On-State Resistance Test Circuit VCC VCC VI A A or B B or A VO VIL C VC (OFF) Condition 1: VI = GND, VO = VCC Condition 2: VI = VCC, VO = GND GND Figure 2. Off-State Switch Leakage-Current Test Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN74LVC1G66 Q1 SINGLE BILATERAL ANALOG SWITCH SCES499B − OCTOBER 2003 − REVISED JANUARY 2005 PARAMETER MEASUREMENT INFORMATION VCC VCC VI = VCC or GND A A or B B or A VO VO = Open VIH C VC (ON) GND Figure 3. On-State Leakage-Current Test Circuit 6 POST OFFICE BOX 655303