3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54LVTH162245, SN74LVTH162245A 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS260L – JUNE 1993 – REVISED MARCH 2000 D D D D D D D D D D D D D Members of the Texas Instruments Widebus ™ Family State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation A-Port Outputs Have Equivalent 22-Ω Series Resistors, So No External Resistors Are Required Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC ) Support Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Ioff and Power-Up 3-State Support Hot Insertion Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Distributed VCC and GND Pins Minimize High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II (SN74LVTH162245A Only) ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) (SN74LVTH162245A Only) Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings SN54LVTH162245 . . . WD PACKAGE SN74LVTH162245A . . . DGG OR DL PACKAGE (TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2DIR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1OE 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OE NOTE: For tape and reel order entry: The DGGR package is abbreviated to GR. description The SN54LVTH162245 and SN74LVTH162245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000 Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54LVTH162245, SN74LVTH162245A 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS260L – JUNE 1993 – REVISED MARCH 2000 description (continued) These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors to reduce overshoot and undershoot. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH162245 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74LVTH162245A is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each 8-bit section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LVTH162245, SN74LVTH162245A 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS260L – JUNE 1993 – REVISED MARCH 2000 logic symbol† 48 1OE 1DIR 1 25 2OE 2DIR 24 G3 3 EN1 [BA] 3 EN2 [AB] G6 6 EN4 [BA] 6 EN5 [AB] 1A1 47 1 2 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 46 44 43 41 40 38 37 36 4 5 3 5 6 8 9 11 12 13 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2 1B1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 35 33 32 30 29 27 26 14 16 17 19 20 22 23 2B2 2B3 2B4 2B5 2B6 2B7 2B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1DIR 1 2DIR 48 24 1OE 25 2OE 1A1 47 2A1 36 2 1B1 13 2B1 To Seven Other Channels To Seven Other Channels POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54LVTH162245, SN74LVTH162245A 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS260L – JUNE 1993 – REVISED MARCH 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the high state, VO (see Note 1) . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Current into any output in the low state, IO: SN54LVTH162245 (B port) . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74LVTH162245A (B port) . . . . . . . . . . . . . . . . . . . . . . 128 mA A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Current into any output in the high state, IO (see Note 2): SN54LVTH162245 (B port) . . . . . . . . . . . . . 48 mA SN74LVTH162245A (B port) . . . . . . . . . . . 64 mA A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This current flows only when the output is in the high state and VO > VCC. 3. The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions (see Note 4) SN54LVTH162245 MIN VCC VIH VIL VI IOH IOL ∆t/∆v ∆t/∆VCC TA Supply voltage High-level input voltage Low-level input voltage Input voltage High-level High level output current Low-level Low level output current Input transition rise or fall rate Power-up ramp rate Operating free-air temperature A port B port A port B port Outputs enabled 200 –55 125 2.7 2 0.8 5.5 –12 –24 12 48 10 200 –40 85 MAX 3.6 SN74LVTH162245A MIN 2.7 2 0.8 5.5 –12 –32 12 64 10 MAX 3.6 UNIT V V V V mA mA ns/V µs/V °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LVTH162245, SN74LVTH162245A 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS260L – JUNE 1993 – REVISED MARCH 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK A port VOH B port TEST CONDITIONS VCC = 2.7 V, VCC = 2.7 V to 3.6 V, VCC = 3 V, VCC = 2.7 V to 3.6 V, VCC = 2.7 V, VCC = 3 V A port VCC = 2.7 V to 3.6 V, VCC = 3 V, VCC = 2 7 V 2.7 VOL B port VCC = 3 V II = –18 mA IOH = –100 µA IOH = –12 mA IOH = –100 µA IOH = –8 mA IOH = –24 mA IOH = –32 mA IOL = 100 µA IOL = 12 mA IOL = 100 µA IOL = 24 mA IOL = 16 mA IOL = 32 mA IOL = 48 mA IOL = 64 mA VI = VCC or GND VI = 5.5 V VI = 5.5 V VI = VCC VI = 0 VI or VO = 0 to 4.5 V VI = 0.8 V 75 –75 MIN SN54LVTH162245 TYP† MAX –1.2 VCC–0.2 2 VCC–0.2 2.4 2 2 0.2 0.8 0.2 0.5 0.4 0.5 0.55 0.55 ±1 10 20 5 –10 75 –75 ±500 ±100* ±100* 0.19 5 0.19 0.3 4 4 ±100 ±100 0.19 5 0.19 0.2 mA pF mA µA µA µA ±1 10 20 5 –10 ±1