N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages



Part  Number SLF12565T-470M2R4
Manufacturer National Semiconductor
Semiconductor DataSheet

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LM2727/LM2737 N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages June 2003 LM2727/LM2737 N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages General Description The LM2727 and LM2737 are high-speed, synchronous, switching regulator controllers. They are intended to control currents of 0.7A to 20A with up to 95% conversion efficiencies. The LM2727 employs output over-voltage and undervoltage latch-off. For applications where latch-off is not desired, the LM2737 can be used. Power up and down sequencing is achieved with the power-good flag, adjustable soft-start and output enable features. The LM2737 and LM2737 operate from a low-current 5V bias and can convert from a 2.2V to 16V power rail. Both parts utilize a fixedfrequency, voltage-mode, PWM control architecture and the switching frequency is adjustable from 50kHz to 2MHz by adjusting the value of an external resistor. Current limit is achieved by monitoring the voltage drop across the onresistance of the low-side MOSFET, which enhances low duty-cycle operation. The wide range of operating frequencies gives the power supply designer the flexibility to finetune component size, cost, noise and efficiency. The adaptive, non-overlapping MOSFET gate-drivers and high-side bootstrap structure helps to further maximize efficiency. The high-side power FET drain voltage can be from 2.2V to 16V and the output voltage is adjustable down to 0.6V. Features n Input power from 2.2V to 16V n Output voltage adjustable down to 0.6V n Power Good flag, adjustable soft-start and output enable for easy power sequencing n Output over-voltage and under-voltage latch-off (LM2727) n Output over-voltage and under-voltage flag (LM2737) n Reference Accuracy: 1.5% (0˚C - 125˚C) n Current limit without sense resistor n Soft start n Switching frequency from 50 kHz to 2 MHz n TSSOP-14 package Applications n n n n n Cable Modems Set-Top Boxes/ Home Gateways DDR Core Power High-Efficiency Distributed Power Local Regulation of Core Power Typical Application 20049410 © 2003 National Semiconductor Corporation DS200494 www.national.com LM2727/LM2737 Connection Diagram 20049411 14-Lead Plastic TSSOP θJA = 155˚C/W NS Package Number MTC14 Pin Description BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate drive. The voltage should be at least one gate threshold above the regulator input voltage to properly turn on the high-side N-FET. LG (Pin 2) - Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HG to avoid shoot-through problems. PGND (Pins 3, 13) - Ground for FET drive circuitry. It should be connected to system ground. SGND (Pin 4) - Ground for signal level circuitry. It should be connected to system ground. VCC (Pin 5) - Supply rail for the controller. PWGD (Pin 6) - Power Good. This is an open drain output. The pin is pulled low when the chip is in UVP, OVP, or UVLO mode. During normal operation, this pin is connected to VCC or other voltage source through a pull-up resistor. ISEN (Pin 7) - Current limit threshold setting. This sources a fixed 50µA current. A resistor of appropriate value should be connected between this pin and the drain of the low-side FET. EAO (Pin 8) - Output of the error amplifier. The voltage level on this pin is compared with an internally generated ramp signal to determine the duty cycle. This pin is necessary for compensating the control loop. SS (Pin 9) - Soft start pin. A capacitor connected between this pin and ground sets the speed at which the output voltage ramps up. Larger capacitor value results in slower output voltage ramp but also lower inrush current. FB (Pin 10) - This is the inverting input of the error amplifier, which is used for sensing the output voltage and compensating the control loop. FREQ (Pin 11) - The switching frequency is set by connecting a resistor between this pin and ground. SD (Pin 12) - IC Logic Shutdown. When this pin is pulled low the chip turns off the high side switch and turns on the low side switch. While this pin is low, the IC will not start up. An internal 20µA pull-up connects this pin to VCC. HG (Pin 14) - Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LG to avoid shootthrough problems. www.national.com 2 LM2727/LM2737 Absolute Maximum Ratings (Note 1) Infrared or Convection (20sec) ESD Rating 235˚C 2 kV If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VCC BOOTV Junction Temperature Storage Temperature Soldering Information Lead Temperature (soldering, 10sec) 260˚C 7V 21V 150˚C −65˚C to 150˚C Operating Ratings Supply Voltage (VCC) Junction Temperature Range Thermal Resistance (θJA) 4.5V to 5.5V −40˚C to +125˚C 155˚C/W Electrical Characteristics VCC = 5V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ=+25˚C. Limits appearing in boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Symbol Parameter Conditions VCC = 4.5V, 0˚C to +125˚C VCC = 5V, 0˚C to +125˚C VFB_ADJ FB Pin Voltage VCC = 5.5V, 0˚C to +125˚C VCC = 4.5V, −40˚C to +125˚C VCC = 5V, −40˚C to +125˚C VCC = 5.5V, −40˚C to +125˚C VON UVLO Thresholds Rising Falling SD = 5V, FB = 0.55V Fsw = 600kHz SD = 5V, FB = 0.65V Fsw = 600kHz SD = 0V FB Voltage Going Up FB Voltage Going Down SS Voltage = 2.5V 0˚C to +125˚C -40˚C to +125˚C 1 0.8 0.15 Min 0.591 0.591 0.591 0.589 0.589 0.589 Typ 0.6 0.6 0.6 0.6 0.6 0.6 4.2 3.6 1.5 1.7 0.4 6 6 20 8 5 11 11 95 35 28 50 50 65 65 15 15 2 mA 2.2 0.7 mA µs µs µA µA Max 0.609 0.609 0.609 0.609 0.609 0.609 V V Units IQ-V5 Operating VCC Current Shutdown VCC Current tPWGD1 tPWGD2 ISD ISS-ON PWGD Pin Response Time PWGD Pin Response Time SD Pin Internal Pull-up Current SS Pin Source Current ISS-OC SS Pin Sink Current During Over SS Voltage = 2.5V Current ISEN Pin Source Current Trip Point Error Amplifier Unity Gain Bandwidth Error Amplifier DC Gain Error Amplifier Slew Rate FB Pin Bias Current EAO Pin Current Sourcing and Sinking Error Amplifier Maximum Swing FB = 0.55V FB = 0.65V VEAO = 2.5, FB = 0.55V VEAO = 2.5, FB = 0.65V Minimum Maximum 0 0 0˚C to +125˚C -40˚C to +125˚C µA µA ISEN-TH ERROR AMPLIFIER GBW G SR IFB IEAO VEA 5 60 6 15 30 2.8 0.8 1.2 3.2 100 155 MHz dB V/µA nA mA V 3 www.national.com LM2727/LM2737 Electrical Characteristics (Continued) VCC = 5V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA=TJ=+25˚C. Limits appearing in boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Symbol Parameter BOOT Pin Quiescent Current Conditions BOOTV = 12V, EN = 0 0˚C to +125˚C -40˚C to +125˚C BOOT-SW = 5V@350mA BOOT-SW = 5V@350mA BOOT-SW = 5V@350mA BOOT-SW = 5V@350mA Min Typ Max Units GATE DRIVE IQ-BOOT 95 95 3 2 3 2 160 215 µA RDS1 RDS2 RDS3 RDS4 OSCILLATOR Top FET Driver Pull-Up ON resistance Top FET Driver Pull-Down ON resistance Bottom FET Driver Pull-Up ON resistance Bottom FET Driver Pull-Down ON resistance Ω Ω Ω Ω RFADJ = 590kΩ RFADJ = 88.7kΩ fOSC PWM Frequency RFADJ = 42.2kΩ, 0˚C to +125˚C RFADJ = 42.2kΩ, -40˚C to +125˚C RFADJ = 17.4kΩ RFADJ = 11.3kΩ D Max Duty Cycle fPWM = 300kHz fPWM = 600kHz 500 490 50 300 600 600 1400 2000 90 88 2.6 3.5 % 700 700 kHz LOGIC INPUTS AND OUTPUTS VSD-IH VSD-IL VPWGD-TH-LO SD Pin Logic High Trip Point SD Pin Logic Low Trip Point PWGD Pin Trip Points 0˚C to +125˚C -40˚C to +125˚C FB Voltage Going Down 0˚C to +125˚C -40˚C to +125˚C FB Voltage Going Up 0˚C to +125˚C -40˚C to +125˚C 1.3 1.25 0.413 0.410 0.691 0.688 V V 1.6 1.6 0.430 0.430 0.710 0.710 35 110 0.446 0.446 0.734 0.734 V VPWGD-TH-HI PWGD Pin Trip Points V VPWGD-HYS PWGD Hysteresis (LM2737 only) FB Voltage Going Down FB Voltage Going Up mV Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device operates correctly. Opearting Ratings do not imply guaranteed performance limits. Note 2: The human body model is a 100pF capacitor discharged through a 1.5k resistor into each pin. www.national.com 4 LM2727/LM2737 Typical Performance Characteristics Efficiency (VO = 1.5V) FSW = 300kHz, TA = 25˚C Efficiency (VO = 3.3V) FSW = 300kHz, TA = 25˚C 20049412 20049413 VCC Operating Current vs Temperature FSW = 600kHz, No-Load Bootpin Current vs Temperature for BOOTV = 12V FSW = 600kHz, Si4826DY FET, No-Load 20049415 20049414 Bootpin Current vs Temperature with 5V Bootstrap FSW = 600kHz, Si4826DY FET, No-Load PWM Frequency vs Temperature for RFADJ = 43.2kΩ 20049416 20049417 5 www.national.com LM2727/LM2737 Typical Performance Characteristics RFADJ vs PWM Frequency (in 100 to 800kHz range), TA = 25˚C (Continued) RFADJ vs PWM Frequency (in 900 to 2000kHz range), TA = 25˚C 20049418 20049419 VCC Operating Current Plus Boot Current vs PWM Frequency (Si4826DY FET, TA = 25˚C) Switch Waveforms (HG Falling) VIN = 5V, VO = 1.8V IO = 3A, CSS = 10nF FSW = 600kHz 20049423 20049420 Switch Waveforms (HG Rising) VIN = 5V, VO = 1.8V IO = 3A, FSW = 600kHz Start-Up (No-Load) VIN = 10V, VO = 1.2V CSS = 10nF, FSW = 300kHz 20049424 20049421 www.national.com 6 LM2727/LM2737 Typical Performance Characteristics Start-Up (Full-Load) VIN = 10V, VO = 1.2V IO = 10A, CSS = 10nF FSW = 300kHz (Continued) Start Up (No-Load, 10x CSS) VIN = 10V, VO = 1.2V CSS = 100nF, FSW = 300kHz 20049422 20049426 Start Up (Full Load, 10x CSS) VIN = 10V, VO = 1.2V IO = 10A, CSS = 100nF FSW = 300kHz Shutdown VIN = 10V, VO = 1.2V IO = 10A, CSS = 10nF FSW = 300kHz 20049425 20049427 Start Up (Full Load, 10x CSS) VIN = 10V, VO = 1.2V IO = 10A,



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