Analog to Digital Converters

www.DataSheet4U.com ICL7135C, TLC7135C 4 1/2-DIGIT PRECISION ANALOG-TO-DIGITAL CONVERTERS SLAS074B – DECEMBER 1986 – REVISED MAY 1999 D D D D D D D D D D D Zero Reading for 0-V Input Precision Null Detection With True Polarity at Zero 1-pA Typical Input Current True Differential Input Multiplexed Binary-Coded-Decimal (BCD) Output Low Rollover Error: ± 1 Count Max Control Signals Allow Interfacing With UARTs or Microprocessors Autoranging Capability With Over- and Under-Range Signals TTL-Compatible Outputs Direct Replacement for Teledyne TSC7135, Intersil ICL7135, Maxim ICL7135, and Siliconix Si7135 CMOS Technology DW OR N PACKAGE (TOP VIEW) VCC – REF ANLG COMMON INT OUT AUTO ZERO BUFF OUT Cref – Cref + IN – IN + VCC + D5 B1 B2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 UNDER RANGE OVER RANGE STROBE RUN/HOLD DGTL GND POLARITY CLK BUSY D1 D2 D3 D4 B8 B4 description The ICL7135C and TLC7135C converters are manufactured with Texas Instruments highly efficient CMOS technology. These 4 1/2-digit, dual-slope-integrating, analog-to-digital converters (DACs) are designed to provide interfaces to both a microprocessor and a visual display. The digit-drive outputs D1 through D4 and multiplexed binary-coded-decimal outputs B1, B2, B4, and B8 provide an interface for LED or LCD decoder/drivers as well as microprocessors. The ICL7135C and TLC7135C offer 50-ppm (one part in 20,000) resolution with a maximum linearity error of one count. The zero error is less than 10 µV and zero drift is less than 0.5 µV/°C. Source-impedance errors are minimized by low input current (less than 10 pA). Rollover error is limited to ± 1 count. The BUSY, STROBE, RUN/HOLD, OVER RANGE, and UNDER RANGE control signals support microprocessor-based measurement systems. The control signals also can support remote data acquisition systems with data transfer through universal asynchronous receiver transmitters (UARTs). The ICL7135C and TLC7135C are characterized for operation from 0°C to 70°C. AVAILABLE OPTIONS PACKAGE TA PLASTIC DIP (N) ICL7135CN TLC7135CN TLC7135CDW SMALL OUTLINE (DW) 0°C to 70°C Caution. These devices have limited built-in protection. The leads should be shorted together or the device placed in conductive foam during storage or handlilng to prevent electrostatic damage to the MOS gates. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 www.DataSheet4U.com ICL7135C, TLC7135C 4 1/2-DIGIT PRECISION ANALOG-TO-DIGITAL CONVERTERS SLAS074B – DECEMBER 1986 – REVISED MAY 1999 functional block diagram DIGITAL SECTION POLARITY From Analog Section 23 Polarity Flip-Flop Latch 20 19 18 17 Zero Cross Detect CLK RUN/HOLD OVER RANGE UNDER RANGE STROBE BUSY DGTL GND 22 25 27 28 26 21 24 Latch Latch Latch Control Logic Counters Latch Multiplexer 12 D1 (LSD) D2 D3 D4 D5 (MSD) Digit Drive Output 13 14 15 16 B1 (LSB) B2 B4 B8 (MSB) Binary Coded Decimal Output ANALOG SECTION Cref 8 Cref + Cref – 7 RINT BUFF OUT 6 5 CAZ AUTO ZERO Integrator CINT 4 INT OUT Buffer 2 – DE(–) DE(+) Z/I A/Z A/Z DE(+) ANLG COMMON 3 DE(–) Input Low A/Z, DE( ±), Z/I POST OFFICE BOX 655303 INT IN + 10 A/Z IN – 9 INT 2 • DALLAS, TEXAS 75265 + – To Digital Section + REF Input High – A/Z Comparator + www.DataSheet4U.com ICL7135C, TLC7135C 4 1/2-DIGIT PRECISION ANALOG-TO-DIGITAL CONVERTERS SLAS074B – DECEMBER 1986 – REVISED MAY 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage (VCC+ with respect to VCC –) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V Analog input voltage (IN – or IN +) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC – to VCC+ Reference voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC – to VCC+ Clock input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VCC+ Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions MIN Supply voltage, VCC+ Supply voltage, VCC– Reference voltage, Vref High-level input voltage, CLK, RUN/HOLD, VIH Low-level input voltage, CLK, RUN/HOLD, VIL Differential input voltage, VID Maximum operating frequency, fclock (see Note 1) Operating free-air temperature range, TA NOTE 1: Clock frequency range extends down to 0 Hz. VCC – +1 1.2 0 2 70 2.8 0.8 VCC+ – 0.5 4 –3 NOM 5 –5 1 MAX 6 –8 UNIT V V V V V V MHz °C electrical characteristics, VCC+ = 5 V, VCC– = 5 V, Vref = 1 V, fclock = 120 kHz, TA = 25°C (unless otherwise noted) PARAMETER VOH VOL VON(PP) αVO IIH IIL II ICC + ICC – Cpd High-level High level output voltage Low-level output voltage Peak-to-peak output noise voltage (see Note 2) Zero-reading temperature coefficient of output voltage High-level input current Low-level input current Input leakage current IN – and IN + current, Positive supply current Negative supply current Power dissipation capacitance D1-D5, B1,B2,B4,B8 Other outputs TEST CONDITIONS IO = – 1 mA IO = – 10 µA IO = 1.6 mA VID = 0, Full scale = 2 V VID = 0, VI = 5 V, VI = 0 V, VID = 0 fclock = 0 l k fclock = 0 l k See Note 3 0°C ≤ TA ≤ 70°C 0°C ≤ TA ≤ 70°C 0°C ≤ TA ≤ 70°C TA = 25°C 0°C ≤ TA ≤ 70°C TA = 25°C 0°C ≤ TA ≤ 70°C TA = 25°C 0°C ≤ TA ≤ 70°C MIN 2.4 4.9 15 0.5 0.1 – 0.02 1 1 – 0.8 40 2 10 – 0.1 10 250 2 3 –2 –3 TYP MAX 5 5 0.4 UNIT V V µV µV/°C µA mA pA mA mA pF NOTES: 2. This is the peak-to-peak value that is not exceeded 95% of the time. 3. Factor-relating clock frequency to increase in supply current. At VCC+ = 5 V, ICC+ = ICC+(fclock = 0) + Cpd × 5 V × fclock POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 www.DataSheet4U.com ICL7135C, TLC7135C 4 1/2-DIGIT PRECISION ANALOG-TO-DIGITAL CONVERTERS SLAS074B – DECEMBER 1986 – REVISED MAY 1999 operating characteristics, VCC+ = 5 V, VCC – = 5 V, Vref = 1 V, fclock = 120 kHz, TA = 25°C (unless otherwise noted) PARAMETER αFS EL ED EFS Full-scale temperature coefficient (see Note 4) Linearity error Differential linearity error (see Note 5) ± Full-scale symmetry error (rollover error) (see Note 6) Display reading with 0-V input Display reading in ratiometric operation TEST CONDITIONS VID = 2 V, 0°C ≤ TA ≤ 70°C – 2 V ≤ VID ≤ 2 V – 2 V ≤ VID ≤ 2 V VID = ± 2 V VID = 0, 0°C ≤ TA ≤ 70°C – 0.0000 0.9998 0.9995 MIN TYP 0.5 0.01 0.5 ± 0.0000 0.9999 0.9999 1 0.0000 1.0000 1.0005 MAX 5 UNIT ppm/°C count LSB count Digital Reading Digital g Reading VID = Vref, TA = 25°C 0°C ≤ TA ≤ 70°C NOTES: 4. This parameter is measured with an external reference having a temperature coefficient of less than 0.01 ppm/°C. 5. The magnitude of the difference between the worst case step of adjacent counts and the ideal step. 6. Rollover error is the difference between the absolute values of the conversion for 2 V and – 2 V. timing diagrams End of Conversion BUSY† B1 – B8 D5 D4 D3 D2 D1 D5 STROBE† 200 Counts D5 201 Counts 200 Counts D4 200 Counts D3 200 Counts D2 200 Counts D1 200 Counts † Delay between BUSY going low and the first STROBE pulse is dependent upon the analog input. Figure 1 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 www.DataSheet4U.com ICL7135C, TLC7135C 4 1/2-DIGIT PRECISION ANALOG-TO-DIGITAL CONVERTERS SLAS074B – DECEMBER 1986 – REVISED MAY 1999 timing diagrams (continued) Digital Scan for OVER-RANGE D5 D4 D3 D2 D1 1000 Counts Figure 2 Integrator Output AUTO ZERO 10,001 Counts Signal Int 10,000 Counts De-Integrate 20,001 Counts Max Full Measurement Cycle 40,002 Counts BUSY OVER RANGE When Applicable UNDER RANGE When Applicable Figure 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 www.DataSheet4U.com ICL7135C, TLC7135C 4 1/2-DIGIT PRECISION ANALOG-TO-DIGITAL CONVERTERS SLAS074B – DECEMBER 1986 – REVISED MAY 1999 timing diagrams (continued) STROBE AUTO ZERO Digit Scan for OVER RANGE D5† Signal Integrate Deintegrate† D4 D3 D2 D1 † First D5 of AUTO ZERO and deintegrate is one count longer. Figure 4 PRINCIPLES OF OPERATION A measurement cycle for the ICL7135C and TLC7135C consists of the following four phases. 1. Auto-Zero Phase. The internal IN + and IN – inputs are disconnected from the terminals and internally connected to ANLG COMMON. The reference capacitor is charged to the reference voltage. The system is configured in a closed loop and the auto-zero capacitor is charged to co