Bi-Directional N-Channel 30-V (D-S) MOSFET

www.DataSheet4U.com SPICE Device Model Si8904EDB Vishay Siliconix Bi-Directional N-Channel 30-V (D-S) MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range • Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics DESCRIPTION The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 5-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 72971 S-60075Rev. B, 23-Jan-05 www.vishay.com 1 www.DataSheet4U.com SPICE Device Model Si8904EDB Vishay Siliconix SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage On-State Drain Current a Symbol Test Condition Simulated Data 1.1 68 0.038 0.049 23 Measured Data Unit VGS(th) ISS(on) RSS(on) Gfs VSS = VGS, ID = 250 µA VSS = 5 V, VGS = 4.5 V VGS = 4.5 V, ISS = 1 A VGS = 2.5 V, ISS = 1 A VSS = 10 V, ISS= 1 A V A 0.037 0.048 12 Ω S Drain-Source On-State Resistancea Forward Transconductancea Dynamicb Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(on) tr td(off) tf VSS = 10 V, RL = 10 Ω ISS ≅ 1 A, VGEN = 4.5 V, RG = 6 Ω 1.4 2.5 1.1 3.3 1.6 2 1.5 3.7 µs Notes a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%. b. Guaranteed by design, not subject to production testing. www.vishay.com 2 Document Number: 72971 S-60075Rev. B, 23-Jan-05 www.DataSheet4U.com SPICE Device Model Si8904EDB Vishay Siliconix COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED) Document Number: 72971 S-60075Rev. B, 23-Jan-05 www.vishay.com 3