RF SYNTHESIZER WITH INTEGRATED VCOS INTEGRATED VCOS

www.DataSheet4U.com Si2200 RF SYNTHESIZER WITH INTEGRATED VCOS FOR SATELLITE RADIO Features ! Dual-band RF synthesizers " " ! ! ! ! ! ! RF1: 2300 to 2500 MHz RF2: 2025 to 2300 MHz 62.5 to 1000 MHz ! ! IF synthesizer " Integrated VCOs, loop filters, varactors, and resonators Minimal external components required Low phase noise 5 µA standby current 25.7 mA typical supply current 2.9 to 3.6 V operation 28-lead QFN " Ordering Information: See page 28. Lead-Free and RoHS Compliant Applications ! Pin Assignments Satellite Radio Si2200-GM Description The Si2200 is a monolithic integrated circuit that performs both IF and RF synthesis for wireless communications applications. The Si2200 includes three VCOs, loop filters, reference and VCO dividers, and phase detectors. Divider and powerdown settings are programmable through a three-wire serial interface. SDATA IFOUT SCLK VDDI GND SEN GND 28 27 26 25 24 23 22 GND GND NC 1 2 3 4 5 6 7 8 GND 21 20 19 GND IFLB IFLA GND VDDD GND XIN Functional Block Diagram GND NC GND GND 18 17 16 15 XIN Reference Amplifier Power Down Control ÷1/÷2 ÷RRF1 Phase Detect RF1 GND 9 GND 10 11 12 13 14 AUXOUT PWDN RFOUT VDDR GND PWDN ÷NRF1 ÷RRF2 Phase Detect ÷2 RFOUT SDATA SCLK SEN Serial Interface 22-bit Data Register RF2 ÷NRF2 ÷RIF Phase Detect ÷2 Patents pending IFDIV IFOUT AUXOUT Test Mux IF ÷NIF IFLA IFLB Rev. 1.0 5/05 Copyright © 2005 by Silicon Laboratories Si2200 www.DataSheet4U.com Si2200 2 Rev. 1.0 www.DataSheet4U.com Si2200 TA B L E O F C O N T E N TS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1. Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.2. Setting the IF VCO Center Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3. Self-Tuning Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.4. Output Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5. PLL Loop Dynamics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.6. RF and IF Outputs (RFOUT and IFOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.7. Reference Frequency Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.8. Powerdown Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.9. Auxiliary Output (AUXOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3. Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 4. Pin Descriptions: Si2200 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 5. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6. Package Outline: Si2200-GM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Rev. 1.0 3 www.DataSheet4U.com Si2200 1. Electrical Specifications Table 1. Recommended Operating Conditions1,2 Parameter Ambient Operating Temperature Ambient Functional Temperature Supply Voltage Supply Voltages Difference Symbol TA TF VDD V∆ (VDDR – VDDD), (VDDI – VDDD) Test Condition Min –40 –40 2.9 –0.3 Typ 25 25 3.3 — Max 85 95 3.6 0.3 Unit °C °C V V Notes: 1. All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise stated. 2. Minimum and maximum specifications are not guaranteed across the functional temperature range. Table 2. Absolute Maximum Ratings1,2 Parameter DC Supply Voltage Input Current3 Input Voltage3 Storage Temperature Range Symbol VDD IIN VIN TSTG Value –0.5 to 4.0 ±10 –0.3 to VDD+0.3 –55 to 150 Unit V mA V oC Notes: 1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. This device is a high performance RF integrated circuit with an ESD rating of < 2 kV. Handling and assembly of this device should only be done at ESD-protected workstations. 3. For signals SCLK, SDATA, SEN, PWDN, and XIN. 4 Rev. 1.0 www.DataSheet4U.com Si2200 Table 3. DC Characteristics (VDD = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter Total Supply Current 1 Symbol Test Condition RF1 and IF operating Min — — — — Typ 28.7 19.5 18.5 10 1 — — — — — — Max 35 24 23 12 — — 0.3 VDD 10 10 — 0.4 Unit mA mA mA mA µA V V µA µA V V RF1 Mode Supply Current1 RF2 Mode Supply Current1 IF Mode Supply Current1 Standby Current High Level Input Voltage2 Low Level Input Voltage2 High Level Input Current2 Low Level Input Current2 High Level Output Voltage3 Low Level Output Voltage3 VIH VIL IIH IIL VOH VOL VIH = 3.6 V, VDD = 3.6 V VIL = 0 V, VDD= 3.6 V IOH = –500 µA IOH = 500 µA PWDN = 0 — 0.7 VDD — –10 –10 VDD–0.4 — Notes: 1. RF1 = 2.4 GHz, RF2 = 2.1 GHz, IFOUT = 800 MHz, LPWR = 0. 2. For signals SCLK, SDATA, SEN, and PWDN. 3. For signal AUXOUT. Rev. 1.0 5 www.DataSheet4U.com Si2200 (VDD = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter1 SCLK Cycle Time SCLK Rise Time SCLK Fall Time SCLK High Time SCLK Low Time SDATA Setup Time to SCLK↑2 SDATA Hold Time from SCLK↑2 SEN↓ to SCLK↑ Delay Time 2 Table 4. Serial Interface Timing Symbol tclk tr tf th tl tsu thold ten1 ten2 ten3 tw Test Condition Figure 1 Figure 1 Figure 1 Figure 1 Figure 1 Figure 2 Figure 2 Figure 2 Figure 2 Figure 2 Figure 2 Min 40 — — 10 10 5 0 10 12 12 10 Typ — — — — — — — — — — — Max — 50 50 — — — — — — — — Unit ns ns ns ns ns ns ns ns ns ns ns SCLK↑ to SEN↑ Delay Time2 SEN↑ to SCLK↑ Delay Time2 SEN Pulse Width Notes: 1. All timing is referenced to the 50% level of the waveform, unless otherwise noted. 2. Timing is not referenced to the 50% level of the waveform. See Figure 2. tr 80% tf SCLK 50% 20% th tclk tl Figure 1. SCLK Timing Diagram 6 Rev. 1.0 www.DataSheet4U.com Si2200 A A Figure 2. Serial Interface Timing Diagram First bit clocked in Last bit clocked in D D D D D D D D D D D D D D D D D D A A A A 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 3 2 1 0 data field Figure 3. Serial Word Format address field Rev. 1.0 7 www.DataSheet4U.com Si2200 Table 5. RF and IF Synthesizer Characteristics (VDD = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter1 Symbol Test Condition Min Typ Max Unit XIN Input Frequency XIN Input Frequency Reference Amplifier Sensitivity Phase Detector Update Frequency fREF fREF VREF fφ XINDIV2 = 0 XINDIV2 = 1 2 25 0.5 — — — — 25 50 VDD +0.3 V 1.0 MHz MHz VPP MHz fφ = fREF/R for XINDIV2 = 0 fφ = fREF/2R for XINDIV2 = 1 0.010 RF1 VCO Tuning Range2 RF2 VCO Tuning Range2 IF VCO Center Frequency Range IFOUT Tuning Range from fCEN IFOUT VCO Tuning Range from fCEN RF1 VCO Pushing RF2 VCO Pushing IF VCO Pushing RF1 VCO Pulling RF2 VCO Pulling IF VCO Pulling RF1 Phase Noise RF1 Integrated Phase Error RF2 Phase Noise RF2 Integrated Phase Error IF Phase Noise at 800 MHz IF Integrated Phase Error 1 MHz offset 100 Hz to 100 kHz 1 MHz offset 100 Hz to 100 kHz 100 kHz offset 100 Hz to 100 kHz VSWR = 2:1, all phases, open loop fCEN with IFDIV Note: L ±10% Open loop 2300 2025 526 62.5 –5 — — — — — — — — — — — — — — — — — 0.75 0.65 0.10 0.250 0.100 0.025 –130 1.2 –131 1.0 –104 0.4 2500 2300 952 1000 5 — — — — — — — — — — — — MHz MHz MHz MHz % MHz/V MHz/V MHz/V MHz p-p MHz p-p MHz p-p dBc/Hz degrees rms dBc/Hz degrees rms dBc/Hz degrees rms Notes: 1. fφ(RF) = 1 MHz, fφ(IF) = 1 MHz, RF1 = 2.4 GHz, RF2 = 2.1 GHz, IFOUT = 800 MHz, LPWR = 0. 2. RF VCO tuning range limits are fixed by inductance of internally bonded wires. 3. From powerup request (PWDN↑ or SEN↑ during a write of 1 to bits PDIB and PDRB in Register 2) to RF and IF synthesizers ready (settled to within 0.1 ppm frequency error). 4. From powerdown request (PWDN↓, or SEN↑ during a write of 0 to bits PDIB and PDRB in Register 2) to supply current equal to IPWDN. 8 Rev. 1.0 www.DataSheet4U.com Si2200 Table 5. RF and IF Synthesizer Characteristics (Continued) (VDD = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter1 Symbol Test Condition Min Typ Max Unit RF1 Harmonic Suppression RF2 Harmonic Suppression IF Harmonic Suppression RFOUT Power Level RFOUT Power Level IFOUT Power Level RF1 Output Reference Spurs Second Harmonic — — — –28 –23 –26 –1 –1 –4 –63 –68 –70 –63 –68 –70 80 40/fφ — –20 –20 –20 3 3 0 — — — — — — 100 50/fφ 100 dBc dBc dBc dBm dBm dBm dBc dBc dBc dBc dBc dBc µs ZL = 50 Ω, RF1 active ZL = 50 Ω, RF2 active ZL = 50 Ω Offset = 1 MHz Offset = 2 MHz Offset = 3 MHz –3 –3 –8 — — — — — — — — — RF2 Output Reference Spurs Offset = 1 MHz Offset = 2 MHz Offset = 3 MHz Powerup Request to Synthesizer Ready3 Time Powerup Request to Synthesizer Ready3 Time Powerdown Request to Synthesizer Off4 Time tpup tpup tpdn