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Part Number |
S3C831B |
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Manufacturer |
Samsung Electronics |
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Semiconductor DataSheet |
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DataSheet View |
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21-S3-C831B/P831B-062003
USER'S MANUAL
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S3C831B/P831B 8-Bit CMOS Microcontroller Revision 1
S3C831B/P831B
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
S3C8-SERIES MICROCONTROLLERS
Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Among the major CPU features are: — Efficient register-oriented architecture — Selectable CPU clock sources — Idle and Stop power-down mode release by interrupt — Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum of four CPU clocks) can be assigned to specific interrupt levels.
S3C831B MICROCONTROLLER
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The S3C831B single-chip microcontroller are fabricated using the highly advanced CMOS process. Its design is based on the powerful SAM88RC CPU core. Stop and idle (power-down) modes were implemented to reduce power consumption. The S3C831B is a microcontroller with a 64K-byte mask-programmable ROM embedded. The S3P831B is a microcontroller with a 64K-byte one-time-programmable ROM embedded. Using the SAM88RC modular design approach, the following peripherals were integrated with the SAM88RC CPU core: — Large number of programable I/O ports (Total 72 pins)
— PLL frequency synthesizer — 16-bits intermediate frequency counter — Two synchronous SIO modules — Two 8-bit timer/counters — One 16-bit timer/counter — Low voltage reset — A/D converter with 8 selectable input pins
OTP
The S3C831B microcontroller is also available in OTP (One Time Programmable) version, S3P831B. The S3P831B microcontroller has an on-chip 64K-byte one-time-programmable EPROM instead of masked ROM. The S3P831B is comparable to S3C831B, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW
S3C831B/P831B
FEATURES
CPU • SAM88RC CPU core Two 8-bit Serial I/O Interface • • • 8-bit transmit/receive mode 8-bit receive mode Selectable baud rate or external clock source
Memory • • 2576-byte internal register file (including LCD display RAM) 64K-byte internal program memory area
PLL Frequency Synthesizer • VIN level: 300mVpp (minimum) • • AMVCO range: 0.5 MHz–30 MHz (3-bit counter added) FMVCO range: 30 MHz–150 MHz
Instruction Set • • 78 instructions Idle and Stop instructions
72 I/O Pins • • 32 normal I/O pins 40 pins sharing with LCD segment signals
16-Bit Intermediate Frequency (IF) Counter • VIN level: 300mVPP (minimum) • • AMIF range: 100 kHz–1 MHz FMIF range: 5 MHz–15 MHz
Interrupts • • 8 interrupt levels and 17 internal sources Fast interrupt processing feature
LCD Controller/Driver • • • 40 segments and 4 common terminals 4/3/2 common and static selectable Internal or external resistor circuit for LCD bias
8-Bit Basic Timer • Watchdog timer function • www.DataSheet4U.com 4 kinds of clock source Timer/Counter 0 • • • Programmable 8-bit internal timer External event counter function PWM and capture function
Low Voltage Reset (LVR) • • Low voltage check to make system reset VLVR: 2.4V, 3.7 V selectable
Two Power-Down Modes • • Idle mode: only CPU clock stops Stop mode: system clock and CPU clock stop
Timer/Counter 1 • • Programmable 8-bit interval timer External event counter function
Oscillation Source • Crystal or ceramic for system clock (fx)
Timer/Counter 2 • • Programmable 16-bit interval timer External event counter function
Instruction Execution Time • 444 ns at 9.0 MHz (minimum)
Operating Temperature Range • –25 °C to +85 °C
Watch Timer • • Interval Time: 50ms, 0.5s, 1.0s at 4.5 MHz 1/1.5/3/6 kHz buzzer output selectable
Operating Voltage Range • • • 2.2V to 5.5V at 0.4 MHz – 4.5 MHz 4.0 V to 5.5 V at 0.4 MHz–9.0 MHz 2.5V to 3.5V, 4.5 V to 5.5 V in PLL/IFC block
Analog to Digital Converter • • 8-channel analog input 8-bit conversion resolution
Package Type • 100-QFP-1420C, 100-TQFP-1414
1-2
S3C831B/P831B
PRODUCT OVERVIEW
BLOCK DIAGRAM
P1.0-P1.7/ RESET INT0-INT7 XIN XOUT P0.2/T0CAP P0.1/T0CLK P0.3/T0OUT/T0PWM P0.4/T1CLK P0.5/T1OUT P0.6/T2CLK P0.7/T2OUT P3.1/SCK0 P3.2/SO0 P3.3/SI0 P3.4/SCK1 P3.5/SO1 P3.6/SI1 Watchdog Timer P3.0/BUZ COM0-3 P8.7-P4.0/SEG0-39 BIAS VLC0 -VLC2 VCOAM VCOFM EO0/EO1 AMIF FMIF P2.0-P2.7/AD0-AD7
CE P0.0 P0.1/T0CLK P0.2/T0CAP P0.3/T0OUT/T0PWM P0.4/T1CLK P0.5/T1OUT P0.6/T2CLK P0.7/T2OUT P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT3 P1.4/INT4 P1.5/INT5 P1.6/INT6 P1.7/INT7 P2.0/AD0 P2.1/AD1 P2.2/AD2 P2.3/AD3 P2.4/AD4 P2.5/AD5 P2.6/AD6 P2.7/AD7 P3.0/BUZ P3.1/SCK0 P3.2/SO0 P3.3/SI0 P3.4/SCK1 P3.5/SO1 P3.6/SI1 P3.7 P4.0/SEG39 P4.1/SEG38 P4.2/SEG37 P4.3/SEG36 P4.4/SEG35 P4.5/SEG34 P4.6/SEG33 P4.7/SEG32 P5.0/SEG31 P5.1/SEG30 P5.2/SEG29 P5.3/SEG28 P5.4/SEG27 P5.5/SEG26 P5.6/SEG25 P5.7/SEG24 P6.0/SEG23 P6.1/SEG22 P6.2/SEG21 P6.3/SEG20 P6.4/SEG19 P6.5/SEG18 P6.6/SEG17 P6.7/SEG16 P7.0/SEG15 P7.1/SEG14 P7.2/SEG13 P7.3/SEG12 P7.4/SEG11 P7.5/SEG10 P7.6/SEG9 P7.7/SEG8
OSC 8-Bit Timer/ Counter0 8-Bit Timer/ Counter1 Port 1 16-Bit Timer/ Counter2 SIO 0 Port 2 SIO 1 Port 0
I/O Port and Interrupt Control
Basic Timer Port 3 Watch Timer
SAM88RC Core
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LCD Driver/ Controller Port 4 PLL Synthesizer IF Counter Port 5 8-Bit ADC
AVDD P8.0/SEG7 P8.1/SEG6 P8.2/SEG5 P8.3/SEG4 P8.4/SEG3 P8.5/SEG2 P8.6/SEG1 P8.7/SEG0 LVREN LVRSEL
64K-byte ROM
2576-byte Register File
Port 6
Port 8
Port 7 Low Voltage Reset TEST1 TEST2 VDD VDDPLL0 VDDPLL1 VSS VSSPLL
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
S3C831B/P831B
PIN ASSIGNMENT
FMIF VDDPLL0 EO0 EO1 CE P0.0 P0.1/T0CLK P0.2/T0CAP P0.3/T0OUT/T0PWM P0.4/T1CLK P0.5/T1OUT P0.6/T2CLK P0.7/T2OUT P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT3 P1.4/INT4 P1.5/INT5 P1.6/INT6 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
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P1.7/INT7 P2.0/AD0 P2.1/AD1 P2.2/AD2 P2.3/AD3 P2.4/AD4 P2.5/AD5 P2.6/AD6 P2.7/AD7 AVDD P3.0/BUZ P3.1/SCK0 P3.2/SO0 P3.3/SI0 VDD VSS XOUT XIN TEST1 TEST2 P3.4/SCK1 RESET P3.5/SO1 P3.6/SI1 P3.7 P4.0/SEG39 P4.1/SEG38 P4.2/SEG37 P4.3/SEG36 P4.4/SEG35
S3C831B
100-QFP-1420C
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
AMIF VSSPLL VCOAM VCOFM VDDPLL1 LVREN LVRSEL BIAS VLC0 VLC1 VLC2 COM0 COM1 COM2 COM3 SEG0/P8.7 SEG1/P8.6 SEG2/P8.5 SEG3/P8.4 SEG4/P8.3 SEG5/P8.2 SEG6/P8.1 SEG7/P8.0 SEG8/P7.7 SEG9/P7.6 SEG10/P7.5 SEG11/P7.4 SEG12/P7.3 SEG13/P7.2 SEG14/P7.1
Figure 1-2. S3C831B Pin Assignments (100-QFP-1420C)
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 SEG15/P7.0 SEG16/P6.7 SEG17/P6.6 SEG18/P6.5 SEG19/P6.4 SEG20/P6.3 SEG21/P6.2 SEG22/P6.1 SEG23/P6.0 SEG24/P5.7 SEG25/P5.6 SEG26/P5.5 SEG27/P5.4 SEG28/P5.3 SEG29/P5.2 SEG30/P5.1 SEG31/P5.0 SEG32/P4.7 SEG33/P4.6 SEG34/P4.5
1-4
S3C831B/P831B
PRODUCT OVERVIEW
VCOAM VSSPLL AMIF FMIF VDDPLL0 EO0 EO1 CE P0.0 P0.1/T0CLK P0.2/T0CAP P0.3/T0OUT/T0PWM P0.4/T1CLK P0.5/T1OUT P0.6/T2CLK P0.7/T2OUT P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT3 P1.4/INT4 P1.5/INT5 P1.6/INT6 P1.7/INT7 P2.0/AD0 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
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P2.1/AD1 P2.2/AD2 P2.3/AD3 P2.4/AD4 P2.5/AD5 P2.6/AD6 P2.7/AD7 AVDD P3.0/BUZ P3.1/SCK0 P3.2/SO0 P3.3/SI0 VDD VSS XOUT XIN TEST1 TEST2 P3.4/SCK1 RESET P3.5/SO1 P3.6/SI1 P3.7 P4.0/SEG39 P4.1/SEG38
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
S3C831B
100-TQFP-1414
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
VCOFM VDDPLL1 LVREN LVRSEL BIAS VLC0 VLC1 VLC2 COM0 COM1 COM2 COM3 SEG0/P8.7 SEG1/P8.6 SEG2/P8.5 SEG3/P8.4 SEG4/P8.3 SEG5/P8.2 SEG6/P8.1 SEG7/P8.0 SEG8/P7.7 SEG9/P7.6 SEG10/P7.5 SEG11/P7.4 SEG12/P7.3
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 SEG13/P7.2 SEG14/P7.1 SEG15/P7.0 SEG16/P6.7 SEG17/P6.6 SEG18/P6.5 SEG19/P6.4 SEG20/P6.3 SEG21/P6.2 SEG22/P6.1 SEG23/P6.0 SEG24/P5.7 SEG25/P5.6 SEG26/P5.5 SEG27/P5.4 SEG28/P5.3 SEG29/P5.2 SEG30/P5.1 SEG31/P5.0 SEG32/P4.7 SEG33/P4.6 SEG34/P4.5 SEG35/P4.4 SEG36/P4.3 SEG37/P4.2
Figure 1-3. S3C831B Pin Assignments (100-TQFP-1414)
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PRODUCT OVERVIEW
S3C831B/P831B
PIN DESCRIPTIONS
Table 1-1. S3C831B Pin Descriptions Pin Names P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P1.0-P1.3 Pin Type I/O Pin Description I/O port with bit programmable pins; Schmitt trigger input or push-pull, open-drain output and software assignable pull-ups. Circuit Type E-4 Pin No. 86(84) 87(85) 88(86) 89(87) 90(88) 91(89) 92(90) 93(91) 94-97 (92-95) Share Pins – T0CLK T0CAP T0OUT/T0PWM T1CLK TOUT T2CLK T2OUT INT0-INT3
I/O
I/O port with bit programmable pins; Schmitt trigger Input or push-pull output and software assignable pull-ups; Alternately used for external interrupt input (noise filters, interrupt enable and pending control). I/O port with bit programmable pins; Input or push-pull and software assignable pull-ups; Alternately used for external interrupt input (Noise filters, interrupt enable and pending control) I/O port with bit programmable pins; Schmitt trigger input or push-pull output and software assignable pull-ups. I/O port with bit programmable pins; Input or pushpull, open-drain output and software assignable pull-ups.
D-7
P1.4-P1.7
I/O
D-8
98-1 (96-99)
INT4-INT7
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P2.0-P2.7
I/O
F-16
2-9 (100-7) 11(9) 12(10) 13(11) 14(12) 21(19) 23(21) 24(22) 25(23) 26-33 (24-31) 34-41 (32-39) 42-49 (40-47) 50-57 (48-55) 58-65 (56-63)
AD0-AD7
P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 P4.0-P4.7
I/O
E-2
BUZ SCK0 SO0 SI0 SCK1 SO1 SI1 – SEG39-SEG32
I/O
I/O port with nibble programmable pins; Input or push-pull, open-drain output and software assignable pull-ups. Same as Port 4 I/O port with nibble programmable pins; Schmitt trigger input |