www.DataSheet4U.com
Rev.2.1_00
CMOS SERIAL E2PROM
S-93A46A/56A/66A
The S-93A46A/56A/66A is a high-temperature operation, high speed, low current consumption, 1 Kbit, 2 K-bit and 4 K-bit serial E2PROM with a wide operating voltage range. It is organized as 64-word × 16-bit, 128-word × 16-bit and 256-word × 16-bit in each. It is capable of sequential read, at which time addresses are automatically incremented in 16-bit blocks. The instruction code is compatible with the NM93CS46/56/66.
Features
• Low current consumption • Wide operating voltage range Standby: 3.0 µA Max. (VCC = 5.5 V) Operating: 1.0 mA Max. (VCC = 5.5 V) 0.6 mA Max. (VCC = 2.7 V) Read: 2.7 to 5.5 V Write: 2.7 to 5.5 V
• Sequential read capable • Write disable function when power supply voltage is low • Function to protect against write due to erroneous instruction recognition • CMOS schmitt input (CS, SK) • Endurance: 106 cycles/word* (at +85°C) 1.5 × 105 cycles/word* (at +125°C) * For each address (Word: 16 bits) • Data retention: 15 years (after rewriting 1.5 × 105 cycles/word at +125°C) • High-temperature operation: +125°C Max. • Lead-free products
Packages
Package name 8-Pin SOP (JEDEC) Package FJ008-A Drawing code Tape FJ008-D Reel FJ008-D
Caution Before using the product in medical equipment or automobile equipment including car audios, keyless entries and engine control units, contact to SII is indispensable.
Seiko Instruments Inc.
1
www.DataSheet4U.com
CMOS SERIAL E2PROM S-93A46A/56A/66A Pin Assignment
8-Pin SOP (JEDEC) Top view
1 8
Rev.2.1_00
Table 1
Pin No. Pin name Pin description 1 CS Chip select input CS VCC 2 SK Serial clock input 2 7 SK NC 3 DI Serial data input 3 6 DI TEST 4 DO Serial data output 4 5 5 GND Ground DO GND *1 6 TEST Test 7 NC No connection 8 VCC Power supply Figure 1 *1. Connect to GND or VCC. Even if this pin is not connected, performance is not affected S-93A46AD0A-J8T2GB (Dynamic burn-in) so long as the absolute maximum rating is not exceeded. S-93A56AD0A-J8T2GB (Dynamic burn-in) S-93A66AD0A-J8T2GB (Dynamic burn-in) Remark Refer to the “Package drawings” for the details. S-93A46AD0A-J8T2GD (Wafer burn-in) S-93A56AD0A-J8T2GD (Wafer burn-in) S-93A66AD0A-J8T2GD (Wafer burn-in)
2
Seiko Instruments Inc.
www.DataSheet4U.com
Rev.2.1_00 Block Diagram
Memory array Address decoder
CMOS SERIAL E2PROM S-93A46A/56A/66A
VCC GND
Data register DI Mode decode logic CS Clock pulse monitoring circuit
Output buffer
DO
Voltage detector
SK
Clock generator
Figure 2
Instruction Sets
1. S-93A46A Table 2 Instruction SK input clock READ (Read data) WRITE (Write data) ERASE (Erase data) WRAL (Write all) ERAL (Erase all) EWEN (Write enable) EWDS (Write disable) Start Bit 1 1 1 1 1 1 1 1 Operation Code 2 1 0 1 0 0 0 0 3 0 1 1 0 0 0 0 4 A5 A5 A5 0 1 1 0 5 A4 A4 A4 1 0 1 0 Address 6 A3 A3 A3 x x x x 7 A2 A2 A2 x x x x 8 A1 A1 A1 x x x x 9 A0 A0 A0 x x x x Data 10 to 25 D15 to D0 output*1 D15 to D0 input D15 to D0 input
*1. When the 16-bit data in the specified address has been output, the data in the next address is output. Remark x: Doesn’t matter
Seiko Instruments Inc.
3
www.DataSheet4U.com
CMOS SERIAL E2PROM S-93A46A/56A/66A
2. S-93A56A Table 3 Instruction SK input clock READ (Read data) WRITE (Write data) ERASE (Erase data) WRAL (Write all) ERAL (Erase all) EWEN (Write enable) EWDS (Write disable) Start Bit 1 1 1 1 1 1 1 1 Operation Code 2 1 0 1 0 0 0 0 3 0 1 1 0 0 0 0 4 x x x 0 1 1 0 5 A6 A6 A6 1 0 1 0 6 A5 A5 A5 x x x x Address 7 A4 A4 A4 x x x x 8 9 10 11
Rev.2.1_00
Data 12 to 27 D15 to D0 output*1 D15 to D0 input D15 to D0 input
A3 A2 A3 A2 A3 A2 x x x x x x x x
A1 A0 A1 A0 A1 A0 x x x x x x x x
*1. When the 16-bit data in the specified address has been output, the data in the next address is output. Remark x: Doesn’t matter 3. S-93A66A Table 4 Instruction SK input clock READ (Read data) WRITE (Write data) ERASE (Erase data) WRAL (Write all) ERAL (Erase all) EWEN (Write enable) EWDS (Write disable) Start Bit 1 1 1 1 1 1 1 1 Operation Code 2 1 0 1 0 0 0 0 3 0 1 1 0 0 0 0 4 A7 A7 A7 0 1 1 0 5 A6 A6 A6 1 0 1 0 6 A5 A5 A5 x x x x Address 7 A4 A4 A4 x x x x 8 9 10 11 Data 12 to 27 D15 to D0 output*1 D15 to D0 input D15 to D0 input
A3 A2 A3 A2 A3 A2 x x x x x x x x
A1 A0 A1 A0 A1 A0 x x x x x x x x
*1. When the 16-bit data in the specified address has been output, the data in the next address is output. Remark x: Doesn’t matter
4
Seiko Instruments Inc.
www.DataSheet4U.com
Rev.2.1_00 Absolute Maximum Ratings
Table 5
CMOS SERIAL E2PROM S-93A46A/56A/66A
Item Symbol Ratings Unit Power supply voltage VCC V −0.3 to +7.0 Input voltage VIN V −0.3 to VCC +0.3 Output voltage VOUT V −0.3 to VCC Operating ambient temperature Topr −40 to +125 °C Storage temperature Tstg −65 to +150 °C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions.
Recommended Operating Conditions
Table 6
Item Power supply voltage
High level input voltage Low level input voltage
Symbol Condition Min. VCC READ/EWDS 2.7 WRITE/ERASE/ 2.7 WRAL/ERAL/EWEN VIH 0.8 × VCC 0.0 VIL
Typ.
Max. 5.5 5.5 VCC 0.2 × VCC
Unit V V V V
Pin Capacitance
Table 7
Item Input Capacitance Output Capacitance
Symbol Condition CIN VIN = 0 V COUT VOUT = 0 V
(Ta = 25°C, f = 1.0 MHz, VCC = 5.0 V) Min. Typ. Max. Unit 8 pF 10 pF
Seiko Instruments Inc.
5
www.DataSheet4U.com
CMOS SERIAL E2PROM S-93A46A/56A/66A Endurance
Table 8
Rev.2.1_00
Operating temperature Endurance NW −40 to +125°C *1. For each address (Word: 16 bits) Item Symbol
Min. 1.5 × 105
Typ.
Max.
Unit cycles/word*1
DC Electrical Characteristics
Table 9
Item Current consumption (READ)
Symbol ICC1
Condition DO no load
VCC = 4.5 to 5.5 V Min. Typ. Max.
VCC = 2.7 to 4.5 V Min. Typ. Max.
Unit mA
1.0
0.6
Table 10
Item Current consumption (WRITE)
Symbol ICC2
Condition DO no load
VCC = 4.5 to 5.5 V Min. Typ. Max.
VCC = 2.7 to 4.5 V Min. Typ. Max.
Unit mA
2.0
1.5
Table 11 Item Standby current consumption Input leakage current Output leakage current Low level output voltage High level output voltage Write enable latch data hold voltage Symbol ISB ILI ILO VOL VOH Condition CS = GND, DO = Open, Other inputs to VCC or GND VIN = GND to VCC VOUT = GND to VCC IOL = 2.1 mA IOL = 100 µA IOH = −400 µA IOH = −100 µA IOH = −10 µA VDH Only when write disable mode VCC = 4.5 to 5.5 V Min. Typ. Max. 2.4 VCC− 0.3 VCC− 0.2 1.5 0.1 0.1 3.0 2.0 2.0 0.6 0.2 VCC = 2.7 to 4.5 V Min. Typ. Max. VCC− 0.3 VCC− 0.2 1.5 0.1 0.1 3.0 2.0 2.0 0.2 Unit µA µA µA V V V V V V
6
Seiko Instruments Inc.
www.DataSheet4U.com
Rev.2.1_00 AC Electrical Characteristics
Table 12 Test Conditions
CMOS SERIAL E2PROM S-93A46A/56A/66A
Input pulse voltage Output reference voltage Output load
0.1 × VCC to 0.9 × VCC 0.5 × VCC 100 pF
Table 13
Parameter
Symbol
VCC = 4.5 to 5.5 V Min. Typ. Max.
VCC = 2.7 to 4.5 V Min. Typ. Max.
Unit
CS setup time tCSS 0.2 — — 0.4 — — µs CS hold time tCSH 0 — — 0 — — µs CS deselect time tCDS 0.2 — — 0.2 — — µs Data setup time tDS 0.1 — — 0.2 — — µs Data hold time tDH 0.1 — — 0.2 — — µs Output delay time tPD — — 0.6 — — 1.2 µs *1 Clock frequency fSK 0 — 1.0 0 — 0.5 MHz Clock pulse width tSKH, tSKL 0.2 — — 0.5 — — µs Output disable time tHZ1, tHZ2 0 — 0.2 0 — 0.5 µs Output enable time tSV 0 — 0.15 0 — 0.5 µs *1. The clock cycle of the SK clock (frequency: fSK) is 1/fSK µs. This clock cycle is determined by a combination of several AC characteristics, so be aware that even if the SK clock cycle time is minimized, the clock cycle (1/fSK) cannot be made to equal tSKL(Min.) + tSKH(Min.).
Table 14
Parameter Write time
Symbol tPR Min.
VCC = 2.7 to 5.5 V Typ. 4.0
Unit Max. 8.0 ms
Seiko Instruments Inc.
7
www.DataSheet4U.com
CMOS SERIAL E2PROM S-93A46A/56A/66A
Rev.2.1_00
tCSS CS tSKH SK tDS DI Hi-Z
*1
1/fSK
*2
tCDS tSKL tCSH
tDH
tDS
tDH
Valid data
Valid data
tPD tSV
tPD Hi-Z
DO (READ) DO
Hi-Z
tHZ2
tHZ1
Hi-Z
(VERIFY)
*1. Indicates high impedance. *2. 1/fSK is the SK clock cycle. This clock cycle is determined by a combination of several AC characteristics, so be aware that even if the SK clock cycle time is minimized, the clock cycle (1/fSK) cannot be made to equal tSKL(Min.) + tSKH(Min.). Figure 3 Timing Chart
8
Seiko Instruments Inc.
www.DataSheet4U.com
Rev.2.1_00 Operation
CMOS SERIAL E2PROM S-93A46A/56A/66A
All instructions are executed by inputting DI in synchronization with the rising edge of SK after CS goes high. An instruction set is input in the order of start bit, instruction, address, and data. Instruction input finishes when CS goes low. A low level must be input to CS between commands during tCDS. While a low level is being input to CS, the S-93A66A is in standby mode, so the SK and DI inputs are invalid and no instructions are allowed.
Start Bit
A start bit is recognized when the DI pin goes high at the rise of SK after CS goes high. After CS goes high, a start bit is not recognized even if the SK pulse is input as long as the DI pin is low.
1. Dummy Clock
SK clocks input while the DI pin is low before a start bit is input are called dummy clocks. Dummy clocks are effective when aligning the number of instruction sets (clocks) sent by the CPU with those required for serial memory operation. For example, when the CPU instruction set is 16 bits, the number of instruction set clocks can be adjusted by inserting the 7-bit dummy clock in S-93A46A and the 5-bit dummy clock in S-93A56A/66A.
2. Start Bit input Failure
