Single Chip Fast Ethernet Controller

RTL8139D(L) REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT AND MULTI-FUNCTION RTL8139D(L) 1. Features........................................................................ 2 2. General Description .................................................... 3 3. Pin Assignment ............................................................ 4 4. Pin Descriptions........................................................... 6 4.1 Power Management/Isolation Interface .................. 6 4.2 PCI Interface........................................................... 6 4.3 EEPROM Interface................................................. 8 4.4 Power Pins.............................................................. 8 4.5 LED Interface ......................................................... 8 4.6 Attachment Unit Interface ...................................... 8 4.7 Multi-Function Interface......................................... 9 4.8 Test And Other Pins ............................................... 9 www.DataSheet4U.com 5. Register Descriptions ................................................ 10 5.1 Receive Status Register in Rx packet header........ 12 5.2 Transmit Status Register....................................... 12 5.3 ERSR: Early Rx Status Register ........................... 13 5.4 Command Register ............................................... 14 5.5 Interrupt Mask Register ........................................ 14 5.6 Interrupt Status Register ....................................... 15 5.7 Transmit Configuration Register .......................... 16 5.8 Receive Configuration Register............................ 18 5.9 9346CR: 93C46 Command Register .................... 20 5.10 CONFIG 0: Configuration Register 0................. 21 5.11 CONFIG 1: Configuration Register 1................. 22 5.12 Media Status Register......................................... 23 5.13 CONFIG 3: Configuration Register3.................. 24 5.14 CONFIG 4: Configuration Register4.................. 25 5.15 Multiple Interrupt Select Register ...................... 26 5.16 PCI Revision ID ................................................. 26 5.17 Transmit Status of All Descriptors (TSAD) Register 26 5.18 Basic Mode Control Register ............................. 27 5.19 Basic Mode Status Register ................................ 27 5.20 Auto-negotiation Advertisement Register........... 28 5.21 Auto-Negotiation Link Partner Ability Register. 29 5.22 Auto-negotiation Expansion Register ................. 29 5.23 Disconnect Counter ............................................ 30 5.24 False Carrier Sense Counter ............................... 30 5.25 NWay Test Register ........................................... 30 5.26 RX_ER Counter.................................................. 30 5.27 CS Configuration Register.................................. 31 5.28 Config5: Configuration Register 5 ......................31 6. EEPROM (93C46) Contents .....................................33 6.1 Summary of RTL8139D(L) EEPROM Registers .......35 6.2 Summary of EEPROM Power Management registers .35 7. PCI Configuration Space Registers..........................36 7.1 PCI Configuration Space Table.............................36 7.2 PCI Configuration Space functions .......................37 7.3 The Default Value after Power-on (RSTB asserted)....41 7.4 PCI Power Management functions ........................42 7.5 VPD (Vital Product Data) .....................................45 8. Block Diagram............................................................46 9. Functional Description ..............................................47 9.1 Transmit operation ................................................47 9.2 Receive operation..................................................47 9.3 Wander Compensation ..........................................47 9.4 Line Quality Monitor ............................................47 9.5 Clock Recovery Module........................................47 9.6 Loopback Operation..............................................47 9.7 Tx Encapsulation...................................................47 9.8 Collision................................................................48 9.9 Rx Decapsulation ..................................................48 9.10 Flow Control .......................................................48 9.10.1. Control Frame Transmission ......................48 9.10.2. Control Frame Reception............................48 9.11 LED Functions ....................................................49 9.11.1 10/100 Mbps Link Monitor .........................49 9.11.2 LED_RX......................................................49 9.11.3 LED_TX......................................................49 9.11.4 LED_TX+LED_RX ....................................50 10. Application Diagram................................................50 11. Electrical Characteristics ........................................51 11.1 Temperature Limit Ratings .................................51 11.2 DC Characteristics ..............................................51 11.2.1 Supply voltage Vcc = 3.0V min. to 3.6V max.............51 11.2.2 Supply voltage Vdd25 = 2.3V min. to 2.7V max..........51 11.3 AC Characteristics ..............................................52 11.3.1 PCI Bus Operation Timing ..........................52 12. Mechanical Dimensions ...........................................58 12.1 QFP .....................................................................58 12.2 LQFP...................................................................59 2001/11/09 1 Rev.1.11 RTL8139D(L) 1. Features ! ! ! ! ! ! 100 pin QFP/LQFP Integrated Fast Ethernet MAC, Physical chip and transceiver in one chip 10 Mb/s and 100 Mb/s operation Supports 10 Mb/s and 100 Mb/s N-way Auto-negotiation operation Supports PCI multi-function capabilities PCI local bus single-chip Fast Ethernet controller # # # # Compliant to PCI Revision 2.2 Supports PCI clock 16.75MHz-40MHz Supports PCI target fast back-to-back transaction Provides PCI bus master data transfers and PCI memory space or I/O space mapped data transfers of RTL8139D(L)'s operational registers # www.DataSheet4U.com ! ! Supports auxiliary power-on internal reset, to be ready for remote wake-up when main power remains off Supports auxiliary power auto-detect, and sets the related capability of power management registers in PCI configuration space ! ! Includes a programmable, PCI burst size and early Tx/Rx threshold Supports a 32-bit general-purpose timer with the external PCI clock as clock source, to generate timer-interrupt ! ! ! ! ! ! ! ! ! ! Contains two large (2Kbyte) independent receive and transmit FIFO’s Advanced power saving mode when LAN function or wakeup function is not used Uses 93C46 (64*16-bit EEPROM) to store resource configuration, ID parameter, and VPD data Supports LED pins for various network activity indications Supports loopback capability Half/Full duplex capability Supports Full Duplex Flow Control (IEEE 802.3x) 2.5/3.3V power supply with 5V tolerant I/Os Up to 128K byte Boot ROM interface for both EPROM and Flash memory is supported 0.25u CMOS process respective owners. Supports PCI VPD (Vital Product Data) Supports ACPI, PCI power management Supports PCI multi-function to incorporate with other PCI master device # # ! Supports 25MHz crystal or 25MHz OSC as the internal clock source. The frequency deviation of either crystal or OSC must be within 50 PPM. ! ! Compliant to PC99 and PC2001 standards Supports Wake-On-LAN function and remote wake-up (Magic Packet*, LinkChg and Microsoft® wake-up frame) ! Supports 4 Wake-On-LAN (WOL) signals (active high, active low, positive pulse, and negative pulse) * Third-party brands and names are the property of their 2001/11/09 2 Rev.1.11 RTL8139D(L) 2. General Description The Realtek RTL8139D(L) is a highly integrated and cost-effective single-chip Fast Ethernet controller that provides 32-bit performance, PCI bus master capability, and full compliance with IEEE 802.3u 100Base-T specifications and IEEE 802.3x Full Duplex Flow Control. It also supports Advanced Configuration Power management Interface (ACPI), PCI power management for modern operating systems that are capable of Operating System Directed Power Management (OSPM) to achieve the most efficient power management possible. The RTL8139D(L) also supports shared Boot ROM pins & clock run pin. In addition to the ACPI feature, the RTL8139D(L) also supports remote wake-up (including AMD Magic Packet, LinkChg, and Microsoft® wake-up frame) in both ACPI and APM environments. The RTL8139D(L) is capable of performing an internal reset through the application of auxiliary power. When auxiliary power is applied and the main power remains off, the RTL8139D(L) is ready and is waiting for the Magic Packet or Link Change to wake the system up. Also, the LWAKE pin provides 4 different output signals including active high, active low, positive pulse, and negative pulse. The versatility of the RTL8139D(L) LWAKE pin provides motherboards with Wake-On-LAN (WOL) functionality. The RTL8139D(L) also supports Analog Auto-Power-down, that is, the analog part of the RTL8139D(L) can be shut down temporarily according to user requirement or when the RTL8139D(L) is in a power down state with the wakeup function disabled. In addition, when the analog part is shut down and the IsolateB pin is low (i.e. the main power is off), then both the analog and digital parts stop functioning and the power consumption of the RTL8139D(L) will be negligible. The RTL8139D(L) also supports an auxiliary power auto-detect function, and will auto-configure related bits of their own PCI power management registers in PCI configuration space. PCI Vital Product Data (VPD) is also supported to provide the information that uniquely identifies hardware (Ex., the OEM brand name of RTL8139D(L) LAN ca