Synchronous-Rectified Buck MOSFET Drivers

www.DataSheet4U.com Preliminary RT9603 Synchronous-Rectified Buck MOSFET Drivers General Description The RT9603 is a high frequency, dual MOSFET drivers specifically designed to drive two power N-Channel MOSFETs in a synchronous-rectified buck converter topology. The device combined with the RT924x series of multi-phase PWM controllers and MOSFETs form a complete core voltage regulator solution for advanced microprocessors. The output drivers in the RT9603 can efficiently switch power MOSFETs at frequencies up to 500kHz. It shall be taken into account the thermal consideration when the switching frequency above 500kHz. Each driver is capable of driving a 3nF load in 30/40ns rise/fall time with fast propagation delay from input transition to the gate of the power MOSFET. The device implements bootstrapping on the upper gate with only an external capacitor and a diode required. This reduces implementation complexity and allows the use of higher performance, cost effective N-Channel MOSFETs. Both drivers incorporate adaptive shoot-through protection to prevent upper and lower MOSFETs from conducting simultaneously and shorting the input supply. An unique feature of the RT9603 driver is the addition of over-voltage protection in the event of upper MOSFET direct shorted before power-on. The RT9603 detects the fault condition during initial start-up, the internal poweron OVP sense circuitry will rapidly drive the output lower MOSFET on before the multi-phase PWM controller takes control. As a result, the input supply will latch into the shutdown state, thereby prevent the processor from damaged. BST IN NC VCC 2 3 4 l l l l l Features l l l Drives Two N-Channel MOSFETs Adaptive Shoot-Through Protection Supports High Switching Frequency - Fast Output Rise Time - Propagation Delay 40ns Tri-State Input for Bridge Shutdown Supply Over-Voltage Protection above Maximum Voltage Rating Supply Under-Voltage Protection Upper MOSFET Direct Shorted Protection Small SOP-8 Package Applications l Core Voltage Supplies for Intel Pentium® 4, AMD® AthlonTM Microprocessors High Frequency Low Profile DC-DC Converters High Current Low Voltage DC-DC Converters IA Equipments l l l Pin Configurations (TOP VIEW) 8 7 6 5 DRVH SW PGND DRVL SOP-8 Ordering Information RT9603 Package Type S : SOP-8 Operating Temperature Range C : Commercial Standard DS9603-00 November 2003 www.richtek.com 1 RT9603 Typical Application Circuit +12V R1 10 Preliminary +12V D1 1N4148 1 4 C1 1uF 3 VCC NC BST C2 C3 1uF C4 1000uF/16V 1uF RT9603 DRVH SW DRVL 8 7 5 PHB95N03LT Q1 PHB83N03LT L1 2uH Q2 R2 2.4K R3 ISNx 2.4K C5 x1500uF VCORE C6 x1500uF PWM INPUT 2 IN 6 PGND ISPx Note: The traces that run from the controller ISPx and ISNx pins, should be run together next to each other and Kelvin connected to the Q2. Place both R2 and R3 as close to the PWM Controller as possible. Functional Pin Description Pin No. Pin Name Pin Function Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor 1 BST between this pin and the SW pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. Accepts a logic control signal. Connect this pin to the PWM output of the controller. If the PWM signal enters and remains within the shutdown window, the output drivers are disabled and both MOSFET gates are pulled and held low. No Internal Connection. Supply Input. Connect to +12V supply. Place a bypass capacitor from this pin to PGND. Lower gate drive output. Should be connected to the lower MOSFET gate. Common Ground. Upper driver return. Should be connected to the common node of upper and lower MOSFETs. The SW voltage is monitored for adaptive shoot-through protection. Upper gate drive output. Should be connected to the upper MOSFET gate. 2 3 4 5 6 7 8 IN NC VCC DRVL PGND SW DRVH www.richtek.com 2 DS9603-00 November 2003 Preliminary Function Block Diagram VCC RT9603 Internal 5V R IN R Control Logic BST Shoot-Through Protection DRVH SW Power-On OVP VCC Shoot-Through Protection DRVL PGND Timing Diagram IN TPDDRVH TRDRVH TFDRVH DRVH DRVL TFDRVL TRDRVL TPDDRVL DS9603-00 November 2003 www.richtek.com 3 RT9603 l l l l l l l Preliminary Absolute Maximum Ratings (Note 1) Supply Voltage (VCC) ------------------------------------------------------------------------------------ 15V BST to SW ------------------------------------------------------------------------------------------------ 15V SW to GND ----------------------------------------------------------------------------------------------- −4V to 15V PWM Input Voltage ------------------------------------------------------------------------------------- GND - 0.3V to 7V DRVH ------------------------------------------------------------------------------------------------------ VSW - 0.3V to VBST + 0.3V DRVL ------------------------------------------------------------------------------------------------------- GND - 0.3V to V VCC + 0.3V Package Thermal Resistance SOP-8, θJA ------------------------------------------------------------------------------------------------ 67°C/W Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------ 260°C Storage Temperature Range ------------------------------------------------------------------------- −40° C to 150° C ESD Susceptibility (Note 2) HBM -------------------------------------------------------------------------------------------------------- 2kV (Note 3) l l l Recommended Operating Conditions l l l Supply Voltage, VCC ------------------------------------------------------------------------------------------------- 12V ±10% Ambient Temperature Range ------------------------------------------------------------------------------------- 0° C to 70° C Junction Temperature Range ------------------------------------------------------------------------------------ 0° C to 125°C Electrical Characteristics (Recommended Operating Conditions, TA = 25°C unless otherwise specified) Parameter V CC Supply Current Power Supply Current Power-On Reset POR Threshold Hysteresis PWM Input Input Current Floating Voltage PW M_IN Threshold DRVH Rise Tim e DRVH Fall Time DRVL Rise Tim e DRVL Fall Time DRVH Turn-Off Propagation Delay DRVL Turn-Off Propagation Delay Shutdown W indow Symbol Test Conditions Min Typ M ax Units IVCC V BST = 12V, V PW M _ IN = 0V -- 5 7 mA V VCCRTH V VCCHYS IPW M _ IN V PW MFL V PW MRTH V PW MFTH T RDRVH T FDRVH T RDRVL T FDRVL T PDDRVH T PDDRVL V CC Rising 8.6 -- 9.9 1.35 10.7 -- V V µA V V V ns ns ns ns ns ns V V PW M _ IN = 0V or 5V V CC = 12V PW M_IN Rising PW M_IN Falling V VCC = 12V, 3nF load V VCC= 12V, 3nF load V VCC= 12V, 3nF load V VCC = 12V, 3nF load V VCC = 12V, 3nF load V VCC = 12V, 3nF load 80 1.1 3.3 1.0 ------1.0 127 2.1 3.7 1.26 30 40 30 30 40 35 -- 150 3.7 4.3 1.5 ------4.3 To be continued www.richtek.com 4 DS9603-00 November 2003 Preliminary Parameter Output Upper Drive Source Upper Drive Sink Lower Drive Source Lower Drive Sink R D RVH R D RVH R D RVL R D RVL V VCC = 12V V VCC = 12V V VCC = 12V V VCC = 12V ----2 2.8 1.9 1.6 Symbol Test Conditions Min Typ RT9603 Max ----Units Ω Ω Ω Ω Note 1. Stresses beyond those listed under “ Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Note 3. The device is not guaranteed to function outside its operating conditions. DS9603-00 November 2003 www.richtek.com 5 RT9603 Applications Information Preliminary The RT9603 is designed to drive both high side and low side N-Channel MOSFET through externally input PWM control signal. It has power-on protection function which held DRVH and DRVL low before VCC up across the rising threshold voltage. After the initialization, the PWM signal takes the control. The rising PWM signal first forces the DRVL signal turns low then DRVH signal is allowed to go high just after a non-overlapping time to avoid shootthrough current. The falling of PWM signal first forces DRVH to go low. When DRVH and SW signal reach a predetermined low level, DRVL signal is allowed to turn high. The non-overlapping function is also presented between DRVH and DRVL signal transient. The PWM signal is acted as "High" if above the rising threshold and acted as "Low" if below the falling threshold. Any signal level enters and remains within the shutdown window is considered as "tri-state", the output drivers are disabled and both MOSFET gates are pulled and held low. If left the PWM signal (IN) floating, the pin will be kept at 2.1V by the internal divider and provide the PWM controller with a recognizable level. The RT9603 typically operates at frequency of 200kHz to 250kHz. It shall be noted that to place a 1N4148 or schottky diode between the VCC and BST pin as shown in the typical application circuit. Driving Power MOSFETs The DC input impedance of the power MOSFET is extremely high. When Vgs at 12V (or 5V), the gate draws the current only few nano-amperes. Thus once the gate has been driven up to "ON" level, the current could be negligible. However, the capacitance at the gate to source terminal should be considered. It requires relatively large currents to drive the gate up and down 12V (or 5V) rapidly. It also required to switch drain current on and off with the required speed. The required gate drive currents are calculated as follows. l gs2 = C gs2 Vg1 D1 d1 VIN Cgd1 Igs1 Ig2 Igd2 g1 g2 Igs2 Cgs2 s2 GND D2 Cgs1 Cgd2 Igd1 Ig1 d2 s1 L VOUT VSW +12V t Vg2 12V t Figure