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Part Number |
PL-2506 |
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Manufacturer |
Prolific |
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Semiconductor DataSheet |
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DataSheet View |
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www.DataSheet4U.com
PL-2506 Hi-Speed USB to IDE Bridge Controller Product Datasheet
Document Revision: 1.2B Document Release: June 19, 2005
Prolific Technology Inc.
7F, No. 48, Sec. 3, Nan Kang Rd. Nan Kang, Taipei 115, Taiwan, R.O.C. Tel: 886-2-2654-6363 Fax: 886-2-2654-6161 Email: sales@prolific.com.tw URL: http://www.prolific.com.tw Support: http://tech.prolific.com.tw
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Revised Date: July 19, 2005 ds_pl2506_v12B.doc
Disclaimer
All the information in this document is subject to change without prior notice. Prolific Technology Inc. does not make any representations or any warranties (implied or otherwise) regarding the accuracy and completeness of this document and shall in no event be liable for any loss of profit or any other commercial damage, including but not limited to special, incidental, consequential, or other damages.
Trademarks
The Prolific logo is a registered trademark of Prolific Technology Inc. All brand names and product names used in this document are trademarks or registered trademarks of their respective holders.
Copyrights
Copyright © 2005 Prolific Technology Inc. All rights reserved. No part of this document may be reproduced or transmitted in any form by any means without the express written permission of Prolific Technology Inc.
PL-2506 Product Datasheet
-2-
Document Version 1.2B
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Revised Date: July 19, 2005 ds_pl2506_v12B.doc
Revision History
Revision 1.2B Description Section 2.1.2: Added Pin Type Abbreviation Section 2.2.2: Added Pin Type Abbreviation Section 6.0: Modify DC Characteristics 1.2 1.1C 1.1B 1.1A 1.0 Sec. 2.2: Added LQFP48 Pin Assignment & Description Sec. 8.3: Added LQFP48 (7x7mm) Outline Diagram Sec. 8.1: Correct LQFP64 (10x10mm) Outline Diagram Sec. 8.2: Correct LQFP64 (7x7mm) Outline Diagram Sec. 8.1: Remove watermark on Outline Diagram Sec. 6.2: Modify Operating Current Parameters Formal Release of Datasheet June 16, 2005 May 17, 2005 March 1, 2005 February 25, 2005 January 26, 2005 July 19, 2005 Date
PL-2506 Product Datasheet
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Document Version 1.2B
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Revised Date: July 19, 2005 ds_pl2506_v12B.doc
Table of Contents
1.0 PRODUCT OVERVIEW ...................................................................................... 7
1.1 Overview ................................................................................................................. 7 1.2 Features .................................................................................................................. 7 1.3 Block Diagram ......................................................................................................... 8
2.0 PIN ASSIGNMENT & DESCRIPTION ................................................................ 9
2.1 LQFP64 Package .................................................................................................... 9 2.1.1 LQFP64 Pin Diagram .................................................................................... 9 2.1.2 LQFP64 Pin Description .............................................................................. 10 2.2 LQFP48 Package .................................................................................................. 12 2.2.1 LQFP48 Pin Diagram .................................................................................. 12 2.2.2 LQFP48 Pin Description .............................................................................. 13
3.0 USB PORT DESCRIPTOR ............................................................................... 15
3.1 Device Descriptor .................................................................................................. 15 3.2 Configuration Descriptor........................................................................................ 16 3.3 Interface Descriptors ............................................................................................. 16 3.4 Endpoint Descriptors ............................................................................................. 17 3.4.1 High-Speed mode........................................................................................ 17 3.4.2 Full-Speed mode ......................................................................................... 17 3.5 Device_Qualifier Descriptors................................................................................. 18 3.6 Other_Speed_Configuration Descriptors............................................................... 18
4.0 DEVICE CONTROL REQUESTS ..................................................................... 19
4.1 Standard Device Control Requests ....................................................................... 19 4.2 Class Specific Requests........................................................................................ 19 4.2.1 Bulk-Only Mass Storage Reset ................................................................... 19 4.2.2 Get Max LUN............................................................................................... 20 4.3 Vendor Specific Requests ..................................................................................... 20 4.3.1 SET_EEPROM_STRING Request .............................................................. 20 4.3.2 GET_EEPROM_STRING Request.............................................................. 20
PL-2506 Product Datasheet
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Document Version 1.2B
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Revised Date: July 19, 2005 ds_pl2506_v12B.doc
5.0 EXTERNAL SERIAL MEMORY........................................................................ 21
5.1 Data Structure of External Serial Memory Contents.............................................. 21
6.0 DC CHARACTERISTICS.................................................................................. 23
6.1 Absolute Maximum Ratings................................................................................... 23 6.2 Operating Current Parameters .............................................................................. 23 6.3 Recommended Operating Conditions ................................................................... 23 6.4 Leakage Current and Capacitance........................................................................ 24 6.5 DC Characteristics of 3.3V Programmable I/O Cells............................................. 24
7.0 ORDERING INFORMATION............................................................................. 24 8.0 OUTLINE DIAGRAM ........................................................................................ 25
8.1 LQFP64pin Package (10mm x 10mm) .................................................................. 25 8.2 LQFP64pin Package (7mm x 7mm) ...................................................................... 26 8.3 LQFP48pin Package (7mm x 7mm) ...................................................................... 27
PL-2506 Product Datasheet
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Document Version 1.2B
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Revised Date: July 19, 2005 ds_pl2506_v12B.doc
List of Figures
Figure 1-1 Block Diagram of PL-2506..................................................................................... 8 Figure 2-1 Pin Assignment Diagram of PL-2506 LQFP64 ...................................................... 9 Figure 2-2 Pin Assignment Diagram of PL-2506 LQFP48 .................................................... 12 Figure 8-1 Outline Diagram of PL-2506 LQFP64 (10mm x 10mm) ...................................... 25 Figure 8-2 Outline Diagram of PL-2506 LQFP64 (7mm x 7mm) .......................................... 26 Figure 8-3 Outline Diagram of PL-2506 LQFP48 (7mm x 7mm) .......................................... 27
List of Tables
Table 2-1 USB2.0 PHY Related Pins (LQFP64) ................................................................... 10 Table 2-2 IDE Interface Related Pins (LQFP64) ................................................................... 10 Table 2-3 System Pins (LQFP64) ..........................................................................................11 Table 2-4 USB2.0 PHY Related Pins (LQFP48) ................................................................... 13 Table 2-5 IDE Interface Related Pins (LQFP48) ................................................................... 13 Table 2-6 System Pins (LQFP48) ......................................................................................... 14 Table 3-1 Device Descriptor.................................................................................................. 15 Table 3-2 Configuration Descriptor ....................................................................................... 16 Table 3-3 Interface Descriptors ............................................................................................. 16 Table 3-4a High-Speed Mode: Bulk Out Endpoint Descriptor (Endpoint 1)........................... 17 Table 3-4b High-Speed Mode: Bulk In Endpoint Descriptor (Endpoint 2) ............................. 17 Table 3-4c Full-Speed Mode: Bulk Out Endpoint Descriptor (Endpoint 1) ............................ 17 Table 3-4d Full-Speed Mode: Bulk In Endpoint Descriptor (Endpoint 2) ............................... 17 Table 3-5 Device Qualifier Descriptors.................................................................................. 18 Table 3-6 Other Speed Configuration Descriptors ................................................................ 18 Table 4-1 Class Specific Requests........................................................................................ 19 Table 4-2 Vendor Specific Requests ..................................................................................... 20 Table 5-1 Data Structure of EEPROM Contents ................................................................... 21 Table 5-2 String Descriptor Entries Data Structure ............................................................... 21 Table 5-3 Example of Valid EEPROM Contents......................... |