Power MOSFET

NTLJS3113P Power MOSFET Features −20 V, −7.7 A, mCoolt Single P−Channel, 2x2 mm, WDFN Package • WDFN Package Provides Exposed Drain Pad for Excellent Thermal • • • • • Conduction 2x2 mm Footprint Same as SC−88 Package Lowest RDS(on) Solution in 2x2 mm Package 1.5 V RDS(on) Rating for Operation at Low Voltage Logic Level Gate Drive Low Profile (< 0.8 mm) for Easy Fit in Thin Environments This is a Pb−Free Device V(BR)DSS http://onsemi.com RDS(on) MAX 40 mW @ −4.5 V −20 V 50 mW @ −2.5 V 75 mW @ −1.8 V 200 mW @ −1.5 V S −7.7 A ID MAX (Note 1) Applications • DC−DC Converters (Buck and Boost Circuits) • Optimized for Battery and Load Management Applications in Portable Equipment such as, Cell Phones, PDA’s, Media Players, etc. • High Side Load Switch MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Steady State t≤5s Power Dissipation (Note 1) Steady State t≤5s Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current TA = 25°C Steady State TA = 85°C TA = 25°C tp = 10 ms PD IDM TJ, TSTG IS TL ID TA = 25°C TA = 85°C TA = 25°C PD TA = 25°C 3.3 −3.5 −2.5 0.7 −23 −55 to 150 −2.8 260 W A °C A °C D G D A Symbol VDSS VGS ID Value −20 ±8.0 −5.8 −4.4 −7.7 1.9 W Unit V V A Pin 1 S www.DataSheet4U.com G D P−CHANNEL MOSFET D WDFN6 CASE 506AP MARKING DIAGRAM 1 2 J8MG G 3 6 5 4 J8 = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS 1 2 3 S (Top View) 6 5 4 D D S Operating Junction and Storage Temperature Source Current (Body Diode) (Note 2) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) D Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface Mounted on FR4 Board using the minimum recommended pad size, (30 mm2, 2 oz Cu). ORDERING INFORMATION Device NTLJS3113PT1G Package WDFN6 (Pb−Free) Shipping † 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 1 May, 2006 − Rev. 3 Publication Order Number: NTLJS3113P/D NTLJS3113P THERMAL RESISTANCE RATINGS Parameter Junction−to−Ambient – Steady State (Note 3) Junction−to−Ambient – t ≤ 5 s (Note 3) Junction−to−Ambient – Steady State Min Pad (Note 4) Symbol RqJA RqJA RqJA Max 65 38 180 °C/W Unit 3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu). MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Gate Threshold Temperature Coefficient Drain−to−Source On−Resistance VGS(TH) VGS(TH)/TJ RDS(on) VGS = −4.5, ID = −3.0 A VGS = −2.5, ID = −3.0 A VGS = −1.8, ID = −2.0 A VGS = −1.5, ID = −1.8 A Forward Transconductance gFS VDS = −16 V, ID = −3.0 A CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge Gate Resistance SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) tf VGS = −4.5 V, VDD = −10 V, ID = −3.0 A, RG = 3.0 W 6.9 17.5 60 56.5 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD RG VGS = −4.5 V, VDS = −16 V, ID = −3.0 A 1329 VGS = 0 V, f = 1.0 MHz, VDS = −16 V 213 120 13 1.5 2.2 2.9 14.4 W 15.7 nC pF VGS = VDS, ID = −250 mA −0.45 −0.67 2.68 32 44 67 90 5.9 40 50 75 200 S −1.0 V mV/°C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, ID = −250 mA ID = −250 mA, Ref to 25°C TJ = 25°C TJ = 85°C −20 −10.1 −1.0 −10 ±1.0 mA V mV/°C mA Symbol Test Conditions Min Typ Max Unit VDS = −16 V, VGS = 0 V VDS = 0 V, VGS = ±8.0 V DRAIN−SOURCE DIODE CHARACTERISTICS Forward Recovery Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Time VSD tRR ta tb QRR VGS = 0 V, dISD/dt = 100 A/ms, IS = −1.0 A VGS = 0 V, IS = −1.0 A TJ = 25°C TJ = 125°C −0.78 −0.67 70.8 14.3 56.4 44 nC 106 ns −1.2 V 5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTLJS3113P TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 7 −ID, DRAIN CURRENT (AMPS) 6 5 4 −1.4 V 3 2 1 0 0 1 2 3 4 5 6 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −1.3 V −1.2 V −1.1 V −1.5 V VGS = −1.7 V to −8 V TJ = 25°C −1.6 V −ID, DRAIN CURRENT (AMPS) 9 8 7 6 5 4 3 2 1 0 0 0.5 1 TJ = 125°C TJ = −55°C 1.5 2 2.5 3 TJ = 25°C VDS ≥ 10 V −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.04 VGS = −4.5 V TJ = 100°C 0.08 TJ = 25°C 0.07 0.06 0.05 0.04 0.03 0.02 0.01 1 2 3 VGS = −4.5 V VGS = −2.5 V VGS = −1.8 V 0.03 TJ = 25°C TJ = −55°C 0.02 1.0 1.5 2.0 2.5 3.0 4 5 6 7 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Drain Current Figure 4. On−Resistance versus Drain Current and Gate Voltage 100000 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.5 ID = −6 A VGS = −4.5 V VGS = 0 V −IDSS, LEAKAGE (nA) 10000 1.3 TJ = 150°C 1.1 1000 TJ = 100°C 100 0.9 0.7 −50 −25 0 25 50 75 100 125 150 10 2 4 6 8 10 12 14 16 18 20 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 NTLJS3113P TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) VDS = VGS = 0 V Ciss TJ = 25°C −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 2800 2400 C, CAPACITANCE (pF) 2000 1600 1200 800 400 0 5 VGS 0 VDS 5 10 15 20 Crss Coss 5 QT 4 20 −VDS , DRAIN−TO−SOURCE VOLTAGE (VOLTS) 16 3 VDS QGD VGS 12 2 QGS 8 1 0 0 ID = −3.0 A TJ = 25°C 4 8 12 QG, TOTAL GATE CHARGE (nC) 4 0 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 1000 −Is, SOURCE CURRENT (AMPS) VDD = −15 V ID = −3.0 A VGS = −4.5 V t, TIME (ns) 100 Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge 3 VGS = 0 V 2.5 2 1.5 1 TJ = 150°C 0.5 TJ = 25°C 0 0 0.2 0.4 0.8 0.6 1.0 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) td(off) tf tr td(on) 10 1 1 10 RG, GATE RESISTANCE (OHMS) 100 Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current 100 −ID, DRAIN CURRENT (AMPS) See Note 2, Page 1 SINGLE PULSE TC = 25°C 10 100 ms 1 ms 1 10 ms 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 dc 0.01 1 10 100 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTLJS3113P TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) EFFECTIVE TRANSIENT THERMAL RESISTANCE 1000 100 D = 0.5 0.2 0.1 10 0.05 0.02 0.01 1 SINGLE PULSE 0.1 0.000001 0.00001 0.0001 0.001 P(pk) See Note 2 on Page 1 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TA = P(pk) RqJA(t) 10 100 1000 t1 t2 DUTY CYCLE, D = t1/t2 0.01 0.1 t, TIME (sec) 1 Figure 12. Thermal Response http://onsemi.com 5 NTLJS3113P PACKAGE DIMENSIONS WDFN6 CASE 506AP−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL LEAD IS CONNECTED TO TERMINAL LEAD # 4. 6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG. DIM A A1 A3 b b1 D D2 E E2 e K L L2 J J1 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.25 0.35 0.51 0.61 2.00 BSC 1.00 1.20 2.00 BSC 1.10 1.30 0.65 BSC 0.15 REF 0.20 0.30 0.20 0.30 0.27 REF 0.65 REF D A B 2X 0.10 C 2X 0.10 C 0.10 C 7X 0.08 C D2 6X L 1 3 E2 NOTE 5 K BOTTOM VIEW mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor th