Power MOSFET

NTHD5904N Power MOSFET 20 V, 4.5 A, Dual N−Channel, ChipFETt Features • Low RDS(on) and Fast Switching Speed • Leadless ChipFET Package has 40% Smaller Footprint than TSOP−6. Ideal Device for Applications Where Board Space is at a Premium. • ChipFET Package Exhibits Excellent Thermal Capabilities. Ideal for Applications Where Heat Transfer is Required. • Pb−Free Packages are Available Applications V(BR)DSS 20 V http://onsemi.com RDS(on) TYP 40 mW @ 4.5 V ID MAX 4.5 A 55 mW @ 2.5 V • DC−DC Buck or Boost Converters • Low Side Switching • Optimized for Battery and Low Side Switching Applications in Computing and Portable Equipment MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Steady State t≤5s Power Dissipation (Note 1) Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current Steady State TA=25°C TA=85°C TA=25°C TA=25°C TA=25°C Steady State tp=10 ms TA=85°C TA=25°C PD IDM TJ, TSTG IS TL PD ID Symbol VDSS VGS ID Value 20 ±8.0 3.3 2.4 4.5 1.13 2.5 1.8 0.64 10 −55 to 150 2.6 260 W A °C A °C W A Unit V V A N−Channel MOSFET D1, D2 G1, G2 S1, S2 www.DataSheet4U.com ChipFET CASE 1206A STYLE 2 PIN CONNECTIONS D1 8 D1 7 D2 6 1 S1 2 G1 3 S2 4 G2 1 2 3 4 MARKING DIAGRAM 8 7 6 5 (Top View) D3 M G Operating Junction and Storage Temperature Source Current (Body Diode) Lead Temperature for Soldering Purposes (1/8” from case for 10 s) THERMAL RESISTANCE RATINGS Parameter Junction−to−Ambient – Steady State (Note 1) Junction−to−Ambient – t ≤ 5 s (Note 1) Junction−to−Ambient – Steady State (Note 2) Symbol RqJA RqJA RqJA Max 110 60 195 Unit °C/W D2 5 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surface Mounted on FR4 Board using the minimum recommended pad size (Cu area = 0.214 in sq). 3. ESD Rating Information: Human Body Model (HBM) Class 0. D3 = Specific Device Code M = Month Code G = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2005 1 November, 2005 − Rev. 2 Publication Order Number: NTHD5904N/D NTHD5904N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current V(BR)DSS IDSS VGS = 0 V VGS = 0 V, VDS = 16 V VGS = 0 V, VDS = 16 V, TJ = 125°C Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Drain−to−Source On−Resistance VGS(TH) RDS(on) VGS = VDS, ID = 250 mA VGS = 4.5 V, ID = 3.3 A VGS = 2.5 V, ID = 2.3 A Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD tRR ta tb QRR VGS = 0 V, IS = 2.6 A, dIS/dt = 100 A/ms VGS = 0 V, IS = 2.6 A 0.8 19.5 6.0 13 7.0 nC 1.15 V ns td(on) tr td(off) tf VGS = 4.5 V, VDS = 16 V, ID = 3.3 A, RG = 2.5 W 6.0 17 17 5.1 ns Ciss Coss Crss QG(TOT) QG(TH) QGS QGD QG(TOT) QG(TH) QGS QGD VGS = 4.5 V, VDS = 10 V, ID = 3.3 A VGS = 2.5 V, VDS = 16 V, ID = 3.3 A VGS = 0 V, f = 1.0 MHz, VDS = 16 V 465 65 30 4.0 0.4 0.8 2.0 6.0 0.5 0.8 1.7 nC nC pF gFS VDS = 10 V, ID = 3.3 A 0.6 0.75 40 55 6.0 1.2 65 105 S V mW IGSS VDS = 0 V, VGS = "8.0 V 20 1.0 10 "100 nA V mA Symbol Test Conditions Min Typ Max Units 4. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. ORDERING INFORMATION Device NTHD5904NT1 NTHD5904NT1G NTHD5904NT3 NTHD5904NT3G Package ChipFET ChipFET (Pb−Free) ChipFET ChipFET (Pb−Free) Shipping † 3000 / Tape & Reel 3000 / Tape & Reel 10,000 / Tape & Reel 10,000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 NTHD5904N TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 11 10 ID, DRAIN CURRENT (AMPS) 9 8 7 6 5 4 3 2 1 0 0 0.5 1 1.5 2 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1.2 V 1.4 V 1.6 V 5V VGS = 4 V VGS = 3 V 2.4 V 2V TJ = 25°C 1.8 V ID, DRAIN CURRENT (AMPS) 11 10 9 8 7 6 5 4 3 2 1 0 0 25°C TJ = −55°C 1 1.5 2 2.5 0.5 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 3 125°C VDS ≥ 10 V Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.08 0.07 0.06 0.05 0.04 0.03 0.02 1 2 3 4 5 6 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.06 Figure 2. Transfer Characteristics ID = 3.3 A TJ = 25°C TJ = 25°C VGS = 2.5 V 0.05 0.04 VGS = 4.5 V 0.03 2 3 4 5 6 ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.6 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) ID = 3.3 A VGS = 2.5 V 1.4 IDSS, LEAKAGE (nA) 1000 10000 Figure 4. On−Resistance vs. Drain Current and Gate Voltage VGS = 0 V TJ = 150°C 1.2 1.0 100 TJ = 100°C 0.8 0.6 −50 10 −25 0 25 50 75 100 125 150 5 10 15 20 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 NTHD5904N TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 1200 1000 C, CAPACITANCE (pF) 800 600 400 200 0 10 Crss 5 VGS 0 VDS 5 10 15 20 Coss Ciss 5 QG 4 VDS VGS 8 10 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) VDS = 0 V VGS = 0 V TJ = 25°C 3 6 2 QGS QGD 4 1 0 0 1 ID = 3.3 A TJ = 25°C 2 3 4 5 QG, TOTAL GATE CHARGE (nC) 6 2 0 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 100 IS, SOURCE CURRENT (AMPS) VDD = 16 V ID = 3.3 A VGS = 4.5 V t, TIME (ns) td(off) tr 10 td(on) 6 5 4 3 2 1 Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge VGS = 0 V TJ = 25°C tf 1 1 10 RG, GATE RESISTANCE (OHMS) 100 0 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 4 NTHD5904N PACKAGE DIMENSIONS ChipFET] CASE 1206A−03 ISSUE G D 8 7 6 5 q L 5 6 3 7 2 8 1 HE 1 2 3 4 E 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE. 4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL AND VERTICAL SHALL NOT EXCEED 0.08 MM. 5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS. 6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE. DIM A b c D E e e1 L HE q MILLIMETERS NOM MAX 1.05 1.10 0.30 0.35 0.15 0.20 3.05 3.10 1.65 1.70 0.65 BSC 0.55 BSC 0.28 0.35 0.42 1.80 1.90 2.00 5° NOM MIN 1.00 0.25 0.10 2.95 1.55 INCHES NOM 0.041 0.012 0.006 0.120 0.065 0.025 BSC 0.022 BSC 0.011 0.014 0.071 0.075 5° NOM MIN 0.039 0.010 0.004 0.116 0.061 MAX 0.043 0.014 0.008 0.122 0.067 e1 e b c STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 A 0.05 (0.002) 0.017 0.079 SOLDERING FOOTPRINT* 2.032 0.08 0.457 0.018 0.635 0.025 0.635 0.025 1.092 0.043 2.032 0.08 0.178 0.007 0.457 0.018 0.711 0.028 0.66 0.026 SCALE 20:1 mm inches 0.66 0.026 0.254 0.010 SCALE 20:1 mm inches Basic *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Style 2 http://onsemi.com 5 NTHD5904N ChipFET is a trademark of Vishay Siliconix ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agains