NSTB1005DXV5T5 (ON Semiconductor) - (NSTB1005DXV5T1 / NSTB1005DXV5T5) Dual Common Base-Collector Bias Resistor Transistors (NSTB1005DXV5T5.pdf)

ON Semiconductor

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NSTB1005DXV5T1, NSTB1005DXV5T5 Preferred Devices Dual Common Base−Collector Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. The NSTB1005DXV5T1 contains two complementary BRT devices are housed in the SOT−553 package which is ideal for low power surface mount applications where board space is at a premium. • Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • Available in 8 mm, 7 inch Tape and Reel www.DataSheet4U.com • Lead Free MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2, − minus sign for Q1 (PNP) omitted) Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit UC D Vdc Vdc mAdc 1 UC = Specific Device Code D = Date Code http://onsemi.com 3 R1 2 R2 1 Q2 R2 Q1 R1 4 5 5 1 SOT−553 CASE 463B MARKING DIAGRAM 5 THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Total Device Dissipation TA = 25°C Derate above 25°C Thermal Resistance − Junction-to-Ambient Characteristic (Both Junctions Heated) Total Device Dissipation TA = 25°C Derate above 25°C Thermal Resistance − Junction-to-Ambient Junction and Storage Temperature 1. FR−4 @ Minimum Pad Symbol PD 357 (Note 1) 2.9 (Note 1) RqJA 350 (Note 1) mW mW/°C °C/W NSTB1005DXV5T5 SOT−553 Symbol PD 500 (Note 1) 4.0 (Note 1) RqJA TJ, Tstg 250 (Note 1) −55 to +150 mW mW/°C °C/W °C Preferred devices are recommended choices for future use and best overall value. Max Unit ORDERING INFORMATION Device Package Shipping† 4 mm pitch 4000/Tape & Reel 2 mm pitch 8000/Tape & Reel NSTB1005DXV5T1 SOT−553 Max Unit †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2004 1 March, 2004 − Rev. 0 Publication Order Number: NSTB1005DXV5/D NSTB1005DXV5T1, NSTB1005DXV5T5 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Q1 TRANSISTOR: PNP − OFF CHARACTERISTICS Collector−Base Cutoff Current (VCB = 50 V, IE = 0) Collector−Emitter Cutoff Current (VCE = 50 V, IB = 0) Emitter−Base Cutoff Current Collector−Base Breakdown Voltage (IC = 10 mA, IE = 0) Collector−Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0) ON CHARACTERISTICS DC Current Gain Collector−Emitter Saturation Voltage (IC = 10 mA, IE = 0.3 mA) Output Voltage (on) (VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kW) Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW) Input Resistor Resistor Ratio Q2 TRANSISTOR: NPN − OFF CHARACTERISTICS Collector-Base Cutoff Current (VCB = 50 V, IE = 0) Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0) Emitter-Base Cutoff Current ON CHARACTERISTICS Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0) Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0) DC Current Gain (VCE = 10 V, IC = 5.0 mA) V(BR)CBO V(BR)CEO hFE VCE(SAT) VOL VOH R1 R1/R2 250 PD , POWER DISSIPATION (MILLIWATTS) 200 50 50 80 − − 4.9 33 0.8 − − 140 − − − 47 1.0 − − − 0.25 0.2 − 61 1.2 Vdc Vdc Vdc kW Vdc Vdc (VEB = 6.0, IC = 5.0 mA) ICBO ICEO IEBO − − − − − − 100 500 0.1 nAdc nAdc mAdc hFE VCE(sat) VOL VOH R1 R1/R2 80 − − 4.9 32.9 0.8 140 − − − 47 1.0 − 0.25 0.2 − 61.1 1.2 Vdc Vdc Vdc kW ICBO ICEO IEBO V(BR)CBO V(BR)CEO − − − 50 50 − − − − − 100 500 0.1 − − nAdc nAdc mAdc Vdc Vdc Symbol Min Typ Max Unit Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW) Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW) Input Resistor Resistor Ratio 150 100 50 0 −50 RqJA = 833°C/W 0 50 100 TA, AMBIENT TEMPERATURE (°C) 150 Figure 1. Derating Curve http://onsemi.com 2 NSTB1005DXV5T1, NSTB1005DXV5T5 TYPICAL ELECTRICAL CHARACTERISTICS − PNP TRANSISTOR VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 1000 hFE , DC CURRENT GAIN (NORMALIZED) VCE = 10 V TA = −25°C 0.1 75°C 25°C TA = 75°C 100 25°C −25°C 0.01 0 20 IC, COLLECTOR CURRENT (mA) 40 50 10 1 10 IC, COLLECTOR CURRENT (mA) 100 Figure 2. VCE(sat) versus IC Figure 3. DC Current Gain 4 f = 1 MHz lE = 0 V TA = 25°C 100 75°C 25°C TA = −25°C Cob , CAPACITANCE (pF) 3 IC, COLLECTOR CURRENT (mA) 10 1 2 0.1 1 0.01 0.001 0 1 2 VO = 5 V 6 7 3 4 5 Vin, INPUT VOLTAGE (VOLTS) 8 9 10 0 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 50 Figure 4. Output Capacitance Figure 5. Output Current versus Input Voltage 100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) 10 TA = −25°C 25°C 75°C 1 0.1 0 10 20 30 IC, COLLECTOR CURRENT (mA) 40 50 Figure 6. Input Voltage versus Output Current http://onsemi.com 3 NSTB1005DXV5T1, NSTB1005DXV5T5 TYPICAL ELECTRICAL CHARACTERISTICS — NPN TRANSISTOR VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 10 IC/IB = 10 1000 VCE = 10 V TA = 75°C 25°C −25°C 1 TA = −25°C 0.1 25°C 75°C hFE, DC CURRENT GAIN 100 0.01 0 20 40 IC, COLLECTOR CURRENT (mA) 50 10 1 10 IC, COLLECTOR CURRENT (mA) 100 Figure 7. VCE(sat) versus IC Figure 8. DC Current Gain 1 0.8 Cob , CAPACITANCE (pF) 0.6 0.4 0.2 0 IC, COLLECTOR CURRENT (mA) f = 1 MHz IE = 0 mA TA = 25°C 100 75°C 10 1 0.1 0.01 25°C TA = −25°C VO = 5 V 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 50 0.001 Figure 9. Output Capacitance Figure 10. Output Current versus Input Voltage 100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = −25°C 10 25°C 75°C 1 0.1 0 10 20 30 40 50 IC, COLLECTOR CURRENT (mA) Figure 11. Input Voltage versus Output Current http://onsemi.com 4 NSTB1005DXV5T1, NSTB1005DXV5T5 PACKAGE DIMENSIONS SOT−553 XV5 SUFFIX 5−LEAD PACKAGE CASE 463B−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. MILLIMETERS MIN MAX 1.50 1.70 1.10 1.30 0.50 0.60 0.17 0.27 0.50 BSC 0.08 0.18 0.10 0.30 1.50 1.70 INCHES MIN MAX 0.059 0.067 0.043 0.051 0.020 0.024 0.007 0.011 0.020 BSC 0.003 0.007 0.004 0.012 0.059 0.067 A −X− C K 4 5 1 2 3 B −Y− S D G 5 PL M J X Y 0.08 (0.003) DIM A B C D G J K S SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.0 0.0394 1.35 0.0531 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 NSTB1005DXV5T1, NSTB1005DXV5T5 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 NSTB1005DXV5/D

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