(MSP430x2x1x) MIXED SIGNAL MICROCONTROLLER

www.DataSheet4U.com MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541A -- JUNE 2007 -- REVISED OCTOBER 2007 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow-Power Consumption: D Supply Voltage Supervisor/Monitor With D D D D D D D D D D D D - Active Mode: 365 μA at 1 MHz, 2.2 V - Standby Mode (VLO): 0.5 μA - Off Mode (RAM Retention): 0.1 μA Wake-Up From Standby Mode in Less Than 1 μs 16-Bit RISC Architecture, 62.5-nsInstruction Cycle Time Three-Channel Internal DMA 12-Bit Analog-to-Digital (A/D) Converter With Internal Reference, Sample-and-Hold, and Autoscan Feature Dual 12-Bit Digital-to-Analog (D/A) Converters With Synchronization 16-Bit Timer_A With Three Capture/Compare Registers 16-Bit Timer_B With Seven Capture/Compare-With-Shadow Registers On-Chip Comparator Four Universal Serial Communication Interfaces (USCIs) - USCI_A0 and USCI_A1 - Enhanced UART Supporting Auto-Baudrate Detection - IrDA Encoder and Decoder - Synchronous SPI - USCI_B0 and USCI_B1 - I2Ct - Synchronous SPI - D D D † Programmable Level Detection Brownout Detector Bootstrap Loader Serial Onboard Programming, No External Programming Voltage Needed Programmable Code Protection by Security Fuse Family Members Include: - MSP430F2416: 92KB+256B Flash Memory, 4KB RAM - MSP430F2417: 92KB+256B Flash Memory, 8KB RAM - MSP430F2418: 116KB+256B Flash Memory, 8KB RAM - MSP430F2419: 120KB+256B Flash Memory, 4KB RAM - MSP430F2616: 92KB+256B Flash Memory, 4KB RAM - MSP430F2617: 92KB+256B Flash Memory, 8KB RAM - MSP430F2618: 116KB+256B Flash Memory, 8KB RAM - MSP430F2619: 120KB+256B Flash Memory, 4KB RAM Available in 80-Pin Quad Flat Pack (QFP) and 64-Pin QFP (See Available Options) For Complete Module Descriptions, See the MSP430x2xx Family User’s Guide, Literature Number SLAU144 The MSP430F241x devices are identical to the MSP430F261x devices, with the exception that the DAC12 modules and the DMA controller are not implemented. description The Texas Instruments MSP430 family of ultralow-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The calibrated digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 μs. The MSP430F261x/241x series are microcontroller configurations with two built-in 16-bit timers, a fast 12-bit A/D converter, a comparator, dual 12-bit D/A converters, four universal serial communication interface (USCI) modules, DMA, and up to 64 I/O pins. The MSP430F241x devices are identical to the MSP430F261x devices, with the exception that the DAC12 and the DMA modules are not implemented. Typical applications include sensor systems, industrial control applications, hand-held meters, etc. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. I2C is a registered trademark of Philips Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 www.DataSheet4U.com MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER AVAILABLE OPTIONS TA PACKAGED DEVICES PLASTIC 80-PIN LQFP (PN) MSP430F2416TPN MSP430F2417TPN MSP430F2418TPN MSP430F2419TPN MSP430F2616TPN MSP430F2617TPN MSP430F2618TPN MSP430F2619TPN PLASTIC 64-PIN LQFP (PM) MSP430F2416TPM MSP430F2417TPM MSP430F2418TPM MSP430F2419TPM MSP430F2616TPM MSP430F2617TPM MSP430F2618TPM MSP430F2619TPM SLAS541A -- JUNE 2007 -- REVISED OCTOBER 2007 --40°C to 105°C 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 www.DataSheet4U.com MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541A -- JUNE 2007 -- REVISED OCTOBER 2007 pin designation, MSP430F241x, 80-pin package AVCC DVSS1 AVSS P6.2/A2 P6.1/A1 P6.0/A0 RST/NMI TCK TMS TDI/TCLK TDO/TDI P8.7/XT2IN P8.6/XT2OUT DVCC1 P6.3/A3 P6.4/A4 P6.5/A5 P6.6/A6 P6.7/A7/SVSIN VREF+ XIN XOUT VeREF+ VREF-/VeREFP1.0/TACLK/CAOUT P1.1/TA0 P1.2/TA1 P1.3/TA2 P1.4/SMCLK P1.5/TA0 P1.6/TA1 P1.7/TA2 P2.0/ACLK/CA2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 P2.1/TAINCLK/CA3 P2.2/CAOUT/TA0/CA4 P2.3/CA0/TA1 P2.4/CA1/TA2 P2.5/ROSC/CA5 P2.6/ADC12CLK/CA6 P2.7/TA0/CA7 P3.0/UCB0STE/UCA0CLK P3.1/UCB0SIMO/UCB0SDA P3.2/UCB0SOMI/UCB0SCL P3.3/UCB0CLK/UCA0STE P3.4/UCA0TXD/UCA0SIMO P3.5/UCA0RXD/UCA0SOMI P3.6/UCA1TXD/UCA1SIMO P3.7/UCA1RXD/UCA1SOMI P4.0/TB0 P4.1/TB1 P4.2/TB2 P4.3/TB3 P4.4/TB4 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 P7.6 P7.5 P7.4 P7.3 P7.2 P7.1 P7.0 DVSS2 DVCC2 P5.7/TBOUTH/SVSOUT P5.6/ACLK P5.5/SMCLK P5.4/MCLK P5.3/UCB1CLK/UCA1STE P5.2/UCB1SOMI/UCB1SCL P5.1/UCB1SIMO/UCB1SDA P5.0/UCB1STE/UCA1CLK P4.7/TBCLK P4.6/TB6 P4.5/TB5 80-pin PN PACKAGE (TOP VIEW) P8.5 P8.4 P8.3 P8.2 P8.1 P8.0 P7.7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 www.DataSheet4U.com MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER pin designation, MSP430F241x, 64-pin package AVCC DVSS1 AVSS P6.2/A2 P6.1/A1 P6.0/A0 RST/NMI TCK TMS TDI/TCLK TDO/TDI XT2IN XT2OUT P5.7/TBOUTH/SVSOUT P5.6/ACLK P5.5/SMCLK 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DVCC1 P6.3/A3 P6.4/A4 P6.5/A5 P6.6/A6 P6.7/A7/SVSIN VREF+ XIN XOUT VeREF+ VREF-/VeREFP1.0/TACLK/CAOUT P1.1/TA0 P1.2/TA1 P1.3/TA2 P1.4/SMCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 P1.5/TA0 P1.6/TA1 P1.7/TA2 P2.0/ACLK/CA2 P2.1/TAINCLK/CA3 P2.2/CAOUT/TA0/CA4 P2.3/CA0/TA1 P2.4/CA1/TA2 P2.5/ROSC/CA5 P2.6/ADC12CLK/CA6 P2.7/TA0/CA7 P3.0/UCB0STE/UCA0CLK P3.1/UCB0SIMO/UCB0SDA P3.2/UCB0SOMI/UCB0SCL P3.3/UCB0CLK/UCA0STE P3.4/UCA0TXD/UCA0SIMO 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P5.4/MCLK P5.3/UCB1CLK/UCA1STE P5.2/UCB1SOMI/UCB1SCL P5.1/UCB1SIMO/UCB1SDA P5.0/UCB1STE/UCA1CLK P4.7/TBCLK P4.6/TB6 P4.5/TB5 P4.4/TB4 P4.3/TB3 P4.2/TB2 P4.1/TB1 P4.0/TB0 P3.7/UCA1RXD/UCA1SOMI P3.6/UCA1TXD/UCA1SIMO P3.5/UCA0RXD/UCA0SOMI 64-pin PM PACKAGE (TOP VIEW) SLAS541A -- JUNE 2007 -- REVISED OCTOBER 2007 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 www.DataSheet4U.com MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541A -- JUNE 2007 -- REVISED OCTOBER 2007 pin designation, MSP430F261x, 80-pin package AVCC DVSS1 AVSS P6.2/A2 P6.1/A1 P6.0/A0 RST/NMI TCK TMS TDI/TCLK TDO/TDI P8.7/XT2IN P8.6/XT2OUT DVCC1 P6.3/A3 P6.4/A4 P6.5/A5/DAC1 P6.6/A6/DAC0 P6.7/A7/DAC1/SVSIN VREF+ XIN XOUT VeREF+/DAC0 VREF-/VeREFP1.0/TACLK/CAOUT P1.1/TA0 P1.2/TA1 P1.3/TA2 P1.4/SMCLK P1.5/TA0 P1.6/TA1 P1.7/TA2 P2.0/ACLK/CA2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 P2.1/TAINCLK/CA3 P2.2/CAOUT/TA0/CA4 P2.3/CA0/TA1 P2.4/CA1/TA2 P2.5/ROSC/CA5 P2.6/ADC12CLK/DMAE0/CA6 P2.7/TA0/CA7 P3.0/UCB0STE/UCA0CLK P3.1/UCB0SIMO/UCB0SDA P3.2/UCB0SOMI/UCB0SCL P3.3/UCB0CLK/UCA0STE P3.4/UCA0TXD/UCA0SIMO P3.5/UCA0RXD/UCA0SOMI P3.6/UCA1TXD/UCA1SIMO P3.7/UCA1RXD/UCA1SOMI P4.0/TB0 P4.1/TB1 P4.2/TB2 P4.3/TB3 P4.4/TB4 80-pin PN PACKAGE (TOP VIEW) 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 P7.6 P7.5 P7.4 P7.3 P7.2 P7.1 P7.0 DVSS2 DVCC2 P5.7/TBOUTH/SVSOUT P5.6/ACLK P5.5/SMCLK P5.4/MCLK P5.3/UCB1CLK/UCA1STE P5.2/UCB1SOMI/UCB1SCL P5.1/UCB1SIMO/UCB1SDA P5.0/UCB1STE/UCA1CLK P4.7/TBCLK P4.6/TB6 P4.5/TB5 P8.5 P8.4 P8.3 P8.2 P8.1 P8.0 P7.7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 www.DataSheet4U.com MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER pin designation, MSP430F261x, 64-pin package P5.7/TBOUTH/SVSOUT SLAS541A -- JUNE 2007 -- REVISED OCTOBER 2007 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DV CC1 P6.3/A3 P6.4/A4 P6.5/A5/DAC1 P6.6/A6/DAC0 P6.7/A7/DAC1/SVSIN VREF+ XIN XOUT VeREF+/DAC0 VREF-/VeREFP1.0/TACLK/CAOUT P1.1/TA0 P1.2/TA1 P1.3/TA2 P1.4/SMCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 P3.1/UCB0SIMO/UCB0SDA P3.0/UCB0STE/UCA0CLK P2.6/ADC12CLK/DMAE0/CA6 P3.2/UCB0SOMI/UCB0SCL P3.3/UCB0CLK/UCA0STE P2.2/CAOUT/TA0/CA4 P1.5/TA0 P1.6/TA1 P1.7/TA2 P2.3/CA0/TA1 P2.4/CA1/TA2 P2.5/ROSC/CA5 P2.0/ACLK/CA2 P2.1/TAINCLK/CA3 P2.7/TA0/CA7 P3.4/UCA0TXD/UCA0SIMO 64-pin PM PACKAGE (TOP VIEW) 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P5.4/MCLK P5.3/UCB1CLK/UCA1STE P5.2/UCB1SOMI/UCB1SCL P5.1/UCB1SIMO/UCB1SDA P5.0/UCB1STE/UCA1CLK P4.7/TBCLK P4.6/TB6 P4.5/TB5 P4.4/TB4 P4.3/TB3 P4.2/TB2 P4.1/TB1 P4.0/TB0 P3.7/UCA1RXD/UCA1SOMI P3.6/UCA1TXD/UCA1SIMO P3.5/UCA0RXD/UCA0SOMI 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 XT2OUT XT2IN P5.5/SMCLK P5.6/ACLK TDI/TCLK RST/NMI DVSS1 AVCC TDO/TDI P6.2/A2 P6.1/A1 P6.0/A0 AVSS TMS TCK www.DataSheet4U.com MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541A -- JUNE 2007 -- REVISED OCTOBER 2007 functional block diagram, MSP430F241x, 80-pin package XIN/ XT2IN XOUT/ XT2OUT 2 2 DVCC1/2 DVSS1/2 AVCC AVSS P1.x/P2.x P3.x/P4.x P5.x/P6.x 2x8 4x8 P7.x/P8.x 2x8/ 1x16 ACLK Oscillators Basic Clock SMCLK System+ MCLK Flash 120kB 116kB 92kB 92kB RAM 4kB 8kB 8kB 4kB ADC12 12-Bit 8 Channels Ports P1/P2 2x8 I/O Interrupt capability Ports P3/P4 P5/P6 4x8 I/O Ports P7/P8 2x8/1x16 I/O USCI A0 UART/ LIN, IrDA, SPI USCI B0 SPI, I2C 16MHz CPU 1MB incl. 16 Registers MAB MDB Emulation JTAG Interface Brownout Protection SVS, SVM Hardware Multiplier MPY, MPYS, MAC, MACS Timer_B7 Watchdog